Table 157. Spi Interrupt Requests - ST STM32L0x3 Reference Manual

Ultra-low-power advanced arm-based 32-bit mcus
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RM0367
31.5
SPI interrupts
During SPI communication an interrupts can be generated by the following events:
Transmit Tx buffer ready to be loaded
Data received in Rx buffer
Master mode fault
Overrun error
TI frame format error
Interrupts can be enabled and disabled separately.
Transmit Tx buffer ready to be loaded
Data received in Rx buffer
Master Mode fault event
Overrun error
CRC error
TI frame format error
For code example, refer to

Table 157. SPI interrupt requests

Interrupt event
A.19.6: SPI interrupt code
RM0367 Rev 7
Serial peripheral interface/ inter-IC sound (SPI/I2S)
Event flag
TXE
RXNE
MODF
OVR
CRCERR
FRE
example.
Enable Control bit
TXEIE
RXNEIE
ERRIE
895/1043
922

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