Figure 155. Counter Timing Diagram, Internal Clock Divided By 1 - ST STM32L0x3 Reference Manual

General-purpose timers (TIM21/22)
The following figures show some examples of the counter behavior for different clock
frequencies when TIMx_ARR=0x36.
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
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Figure 155. Counter timing diagram, internal clock divided by 1

CK_PSC
CNT_EN
31
(UIF)
RM0367 Rev 7
32 33 34 35 36 00 01 02 03 06
04 05
RM0367
07
MS31078V2