Table 3. STM32L0x3 peripheral register boundary addresses
Bus
Boundary address
0X4000 8000 - 0X4000 FFFF
0X4000 7C00 - 0X4000 7FFF
0X4000 7800 - 0X4000 7BFF
0X4000 7400 - 0X4000 77FF
APB1
0X4000 7000 - 0X4000 73FF
0X4000 6C00 - 0X4000 6FFF
0X4000 6800 - 0X4000 6BFF
0X4000 6000 - 0X4000 67FF
0X4000 5C00 - 0X4000 5FFF
62/1043
Size (bytes)
Peripheral
32 K
Reserved
1 K
LPTIM1
1K
I2C3
1 K
DAC1/2
1 K
PWR
1 K
CRS
1 K
Reserved
USB (SRAM
2 K
512x16bit)
1 K
USB FS
RM0367 Rev 7
(1)
(continued)
Peripheral register map
-
Section 24.7.9: LPTIM register
map
Section 28.7.12: I2C register
map
Section 15.10.15: DAC register
map
Section 6.4.3: PWR register
map
Section 8.7.5: CRS register map
-
-
Section 32.6.3: USB register
map
RM0367
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