Application Notes - Renesas H8 Series Hardware Manual

9.5.8

Application Notes

The following types of contention can occur in timer X operation.
1. Contention between FRC write and counter clear
If an FRC clear signal is generated in the T
clearing takes precedence and the write to the counter is not carried out. Figure 9.32 shows the
timing.
φ
Address
Internal write
signal
Counter clear
signal
FRC
Figure 9.32 Contention between FRC Write and Clear
state of a write cycle to the lower byte of FRC,
3
FRC lower byte write cycle
T T
1 2
FRC address
N
Rev. 6.00 Sep 12, 2006 page 265 of 526
Section 9 Timers
T
3
H'0000
REJ09B0326-0600