Register Descriptions - Renesas H8 Series Hardware Manual

8-bit single-chip microcomputer
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Register Configuration
Table 9.20 shows the register configuration of the watchdog timer.
Table 9.20
Watchdog Timer Registers
Name
Timer control/status register W
Timer counter W
9.6.2

Register Descriptions

Timer Control/Status Register W (TCSRW)
Bit
B6WI
Initial value
Read/Write
R
Note:
* Write is permitted only under certain conditions, which are given in the descriptions of
the individual bits.
TCSRW is an 8-bit read/write register that controls write access to TCW and TCSRW itself,
controls watchdog timer operations, and indicates operating status.
Bit 7    Bit 6 Write Inhibit (B6WI): Bit 7 controls the writing of data to bit 6 in TCSRW.
This bit is always read as 1. Data written to this bit is not stored.
Bit 7: B6WI
Description
0
Bit 6 is write-enabled
1
Bit 6 is write-protected
Bit 6    Timer Counter W Write Enable (TCWE): Bit 6 controls the writing of data to bit 8 to
TCW.
Bit 6: TCWE
Description
0
Data cannot be written to TCW
1
Data can be written to TCW
Abbr.
TCSRW
TCW
7
6
5
TCWE
B4WI
1
0
1
R/(W) *
R
R/W
Initial Value
R/W
H'AA
R/W
H'00
4
3
TCSRWE
B2WI
0
1
R/(W) *
R
Rev. 6.00 Sep 12, 2006 page 271 of 526
Section 9 Timers
Address
H'FFBE
H'FFBF
2
1
WDON
B0WI
WRST
0
1
R/(W) *
R/(W) *
R
(initial value)
(initial value)
REJ09B0326-0600
0
0

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