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Renesas H8/3642 Series Manuals
Manuals and User Guides for Renesas H8/3642 Series. We have
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Renesas H8/3642 Series manual available for free PDF download: Hardware Manual
Renesas H8/3642 Series Hardware Manual (551 pages)
8-Bit Single-Chip Microcomputer
Brand:
Renesas
| Category:
Computer Hardware
| Size: 3.63 MB
Table of Contents
Table of Contents
13
Section 1 Overview
23
Overview
23
Internal Block Diagram
28
Pin Arrangement and Functions
29
Pin Arrangement
29
Pin Functions
32
Section 2 CPU
37
Overview
37
Features
37
Address Space
38
Register Configuration
38
Register Descriptions
40
General Registers
40
Control Registers
40
Initial Register Values
42
Data Formats
42
Data Formats in General Registers
43
Memory Data Formats
44
Addressing Modes
45
Effective Address Calculation
47
Instruction Set
51
Data Transfer Instructions
53
Arithmetic Operations
55
Logic Operations
56
Shift Operations
56
Bit Manipulations
58
Branching Instructions
62
System Control Instructions
64
Block Data Transfer Instruction
65
Basic Operational Timing
66
Access to On-Chip Memory (RAM, ROM)
66
Access to On-Chip Peripheral Modules
67
CPU States
68
Overview
68
Program Execution State
70
Program Halt State
70
Exception-Handling State
70
Memory Map
71
Application Notes
72
Notes on Data Access
72
Notes on Bit Manipulation
74
Notes on Use of the EEPMOV Instruction
80
Section 3 Exception Handling
81
Overview
81
Reset
81
Reset Sequence
81
Interrupt Immediately after Reset
83
Interrupts
83
Overview
83
Interrupt Control Registers
85
External Interrupts
93
Internal Interrupts
94
Interrupt Operations
94
Interrupt Response Time
99
Application Notes
100
Notes on Stack Area Use
100
Notes on Rewriting Port Mode Registers
101
Section 4 Clock Pulse Generators
103
Overview
103
Block Diagram
103
System Clock and Subclock
103
System Clock Generator
104
Subclock Generator
106
Prescalers
107
Note on Oscillators
108
Section 5 Power-Down Modes
109
Overview
109
System Control Registers
112
Sleep Mode
116
Transition to Sleep Mode
116
Clearing Sleep Mode
116
Clock Frequency in Sleep (Medium-Speed) Mode
117
Standby Mode
117
Transition to Standby Mode
117
Clearing Standby Mode
117
Oscillator Settling Time after Standby Mode Is Cleared
118
Watch Mode
118
Transition to Watch Mode
118
Clearing Watch Mode
119
Oscillator Settling Time after Watch Mode Is Cleared
119
Subsleep Mode
119
Transition to Subsleep Mode
119
Clearing Subsleep Mode
120
Subactive Mode
120
Transition to Subactive Mode
120
Clearing Subactive Mode
120
Operating Frequency in Subactive Mode
121
Active (Medium-Speed) Mode
121
Transition to Active (Medium-Speed) Mode
121
Clearing Active (Medium-Speed) Mode
121
Operating Frequency in Active (Medium-Speed) Mode
121
Direct Transfer
122
Section 6 ROM
125
Overview
125
Block Diagram
125
PROM Mode
126
Setting to PROM Mode
126
Memory Map
126
Programming
127
Writing and Verifying
128
Programming Precautions
131
Reliability of Programmed Data
132
Flash Memory Overview
133
Principle of Flash Memory Operation
133
Mode Pin Settings and ROM Space
134
Features
134
Block Diagram
135
Pin Configuration
136
Register Configuration
136
Flash Memory Register Descriptions
137
Flash Memory Control Register (FLMCR)
137
Erase Block Register 1 (EBR1)
139
Erase Block Register 2 (EBR2)
140
On-Board Programming Modes
142
Boot Mode
142
User Program Mode
147
Programming and Erasing Flash Memory
149
Program Mode
149
Program-Verify Mode
150
Programming Flowchart and Sample Program
151
Erase Mode
154
Erase-Verify Mode
154
Erase Flowcharts and Sample Programs
155
Prewrite-Verify Mode
169
Protect Modes
170
Interrupt Handling During Flash Memory Programming/Erasing
171
Flash Memory PROM Mode (H8/3644F, H8/3643F, and H8/3642AF)
172
PROM Mode Setting
172
Memory Map
172
Operation in PROM Mode
173
Flash Memory Programming and Erasing Precautions
182
Section 7 RAM
189
Overview
189
Block Diagram
189
Section 8 I/O Ports
191
Overview
191
Port 1
193
Overview
193
Register Configuration and Description
193
Pin Functions
197
Pin States
198
MOS Input Pull-Up
198
Port 2
199
Overview
199
Register Configuration and Description
199
Pin Functions
201
Pin States
201
Port 3
202
Overview
202
Register Configuration and Description
202
Pin Functions
206
Pin States
207
MOS Input Pull-Up
207
Port 5
208
Overview
208
Register Configuration and Description
208
Pin Functions
210
Pin States
211
MOS Input Pull-Up
211
Port 6
212
Overview
212
Register Configuration and Description
212
Pin Functions
213
Pin States
214
Port 7
214
Overview
214
Register Configuration and Description
214
Pin Functions
216
Pin States
217
Port 8
217
Overview
217
Register Configuration and Description
218
Pin Functions
219
Pin States
220
Port 9
221
Overview
221
Register Configuration and Description
221
Pin Functions
222
Pin States
223
Port B
223
Overview
223
Register Configuration and Description
223
Pin Functions
224
Pin States
224
Section 9 Timers
225
Overview
225
Timer a
226
Overview
226
Register Descriptions
228
Timer Operation
230
Timer a Operation States
231
Timer B1
231
Overview
231
Register Descriptions
233
Timer Operation
235
Timer B1 Operation States
236
Timer V
237
Overview
237
Register Descriptions
240
Timer Operation
246
Timer V Operation Modes
251
Interrupt Sources
251
Application Examples
251
Application Notes
254
Timer X
260
Overview
260
Register Descriptions
264
CPU Interface
275
Timer Operation
278
Timer X Operation Modes
285
Interrupt Sources
285
Timer X Application Example
286
Application Notes
287
Watchdog Timer
292
Overview
292
Register Descriptions
293
Timer Operation
296
Watchdog Timer Operation States
297
Section 10 Serial Communication Interface
299
Overview
299
Sci1
299
Register Descriptions
301
Operation in Synchronous Mode
306
Operation in SSB Mode
309
Interrupts
311
Sci3
311
Overview
311
Register Descriptions
314
Operation
331
Operation in Asynchronous Mode
335
Operation in Synchronous Mode
344
Multiprocessor Communication Function
351
Interrupts
358
Application Notes
359
Section 11 14-Bit PWM
363
Overview
363
Features
363
Block Diagram
363
Pin Configuration
364
Register Configuration
364
Register Descriptions
364
PWM Control Register (PWCR)
364
PWM Data Registers U and L (PWDRU, PWDRL)
365
Operation
366
Section 12 A/D Converter
367
Overview
367
Features
367
Block Diagram
368
Pin Configuration
369
Register Configuration
369
Register Descriptions
370
A/D Result Register (ADRR)
370
A/D Mode Register (AMR)
370
A/D Start Register (ADSR)
372
Operation
373
A/D Conversion Operation
373
Start of A/D Conversion by External Trigger Input
373
Interrupts
374
Typical Use
374
Application Notes
377
Section 13 Electrical Characteristics
379
Absolute Maximum Ratings
379
Electrical Characteristics (ZTAT™, Mask ROM Version)
380
Power Supply Voltage and Operating Range
380
DC Characteristics (HD6473644)
383
AC Characteristics (HD6473644)
389
DC Characteristics (HD6433644, HD6433643, HD6433642, HD6433641, HD6433640)
393
AC Characteristics (HD6433644, HD6433643, HD6433642, HD6433641, HD6433640)
398
A/D Converter Characteristics
403
Electrical Characteristics (ZTAT and R of the Mask ROM Version)
404
Power Supply Voltage and Operating Range
404
DC Characteristics (HD6473644R)
407
AC Characteristics (HD6473644R)
413
DC Characteristics (HD6433644R, HD6433643R, HD6433642R, HD6433641R, HD6433640R)
417
AC Characteristics (HD6433644R, HD6433643R, HD6433642R, HD6433641R, HD6433640R)
422
A/D Converter Characteristics
427
Electrical Characteristics (F-ZTAT Version)
428
Power Supply Voltage and Operating Range
428
DC Characteristics (HD64F3644, HD64F3643, HD64F3642A)
431
AC Characteristics (HD64F3644, HD64F3643, HD64F3642A)
437
A/D Converter Characteristics
441
Operation Timing
442
Output Load Circuit
445
Appendix A CPU Instruction Set
447
Instructions
447
Operation Code Map
455
Number of Execution States
457
Appendix B Internal I/O Registers
464
Addresses
464
Functions
468
Appendix C I/O Port Block Diagrams
515
Block Diagrams of Port 1
515
Block Diagrams of Port 2
519
Block Diagrams of Port 3
522
Block Diagrams of Port 5
525
Block Diagram of Port 6
528
Block Diagrams of Port 7
529
Block Diagrams of Port 8
533
Block Diagram of Port 9
541
Block Diagram of Port B
542
Appendix D Port States in the Different Processing States
543
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