Block Data Transfer Instruction - Renesas H8 Series Hardware Manual

15
15
15
op
Legend:
op: Operation field
rn: Register field
IMM: Immediate data
2.5.8

Block Data Transfer Instruction

Table 2.11 describes the block data transfer instruction. Figure 2.10 shows its object code format.
Table 2.11 Block Data Transfer Instruction
Instruction Size

EEPMOV
Certain precautions are required in using the EEPMOV instruction. See section 2.9.3, Notes on
Use of the EEPMOV Instruction, for details.
8 7
op
8 7
op
8 7
Figure 2.9 System Control Instruction Codes
Function
If R4L ≠ 0 then
repeat @R5+ → @R6+
R4L – 1 → R4L
until R4L = 0
else next;
Block transfer instruction. Transfers the number of data bytes
specified by R4L from locations starting at the address indicated by
R5 to locations starting at the address indicated by R6. After the
transfer, the next instruction is executed.
0
RTE, SLEEP, NOP
0
rn
LDC, STC (Rn)
0
ANDC, ORC,
IMM
XORC, LDC (#xx:8)
Rev. 6.00 Sep 12, 2006 page 43 of 526
Section 2 CPU
REJ09B0326-0600