Operation - Renesas H8 Series Hardware Manual

8-bit single-chip microcomputer
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Note: The value set in BRR is given by the following equation:
OSC
N =
(8 × 2
× B)
2n
where
B:
Bit rate (bit/s)
N:
Baud rate generator BRR setting (0 ≤ N ≤ 255)
OSC: Value of φ
n:
Baud rate generator input clock number (n = 0, 1, 2, or 3)
(The relation between n and the clock is shown in table 10.10.)
Table 10.10 Relation between n and Clock
n
0
1
2
3
10.3.3

Operation

SCI3 can perform serial communication in two modes: asynchronous mode in which
synchronization is provided character by character, and synchronous mode in which
synchronization is provided by clock pulses. The serial mode register (SMR) is used to select
asynchronous or synchronous mode and the data transfer format, as shown in table 10.11.
The clock source for SCI3 is determined by bit COM in SMR and bits CKE1 and CKE0 in SCR3,
as shown in table 10.12.
Asynchronous Mode
• Choice of 7- or 8-bit data length
• Choice of parity addition, multiprocessor bit addition, and addition of 1 or 2 stop bits. (The
combination of these parameters determines the data transfer format and the character length.)
• Framing error (FER), parity error (PER), overrun error (OER), and break detection during
reception
× 10
6
– 1
(MHz)
OSC
Clock
φ
φ/4
φ16
φ/64
Section 10 Serial Communication Interface
SMR Setting
CKS1
0
0
1
1
Rev. 6.00 Sep 12, 2006 page 309 of 526
CKS0
0
1
0
1
REJ09B0326-0600

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