A/D Start Register (Adsr) - Renesas H8 Series Hardware Manual

Section 12 A/D Converter
Bits 3 to 0    Channel Select (CH3 to CH0): Bits 3 to 0 select the analog input channel.
The channel selection should be made while bit ADSF is cleared to 0.
Bit 3: Bit 2:
CH3 CH2
0 0
1
1 0
1
Legend: * Don't care
12.2.3

A/D Start Register (ADSR)

Bit
ADSF
Initial value
Read/Write R/W
The A/D start register (ADSR) is an 8-bit read/write register for starting and stopping A/D
conversion.
A/D conversion is started by writing 1 to the A/D start flag (ADSF) or by input of the designated
edge of the external trigger signal, which also sets ADSF to 1. When conversion is complete, the
converted data is set in the A/D result register (ADRR), and at the same time ADSF is cleared
to 0.
Rev. 6.00 Sep 12, 2006 page 350 of 526
REJ09B0326-0600
Bit 1: Bit 0:
CH1 CH0
* *
0 0
1
1 0
1
0 0
1
1 0
1
0 0
1
1 0
1
7 6 5
 
0 1 1
 
Analog Input Channel
No channel selected
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
Reserved
Reserved
Reserved
Reserved
4 3
 
1 1
 
(initial value)
2 1 0
  
1 1 1
  