Application Notes - Renesas H8 Series Hardware Manual

Section 9 Timers
9.4.7

Application Notes

The following types of contention can occur in timer V operation.
Contention between TCNTV Write and Counter Clear: If a TCNTV clear signal is generated
in the T state of a TCNTV write cycle, clearing takes precedence and the write to the counter is
3
not carried out. Figure 9.13 shows the timing.
φ
Address
Internal write
signal
Counter clear
signal
TCNTV
Figure 9.13 Contention between TCNTV Write and Clear
Rev. 6.00 Sep 12, 2006 page 232 of 526
REJ09B0326-0600
TCNTV write cycle by CPU
T T
1 2
TCNTV address
N
T
3
H'00