Structure Of Buzzer Output; Figure 9.2-1 Block Diagram Of Buzzer Output - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 9 BUZZER OUTPUT
9.2

Structure of Buzzer Output

The buzzer output consists of the following two blocks:
• Buzzer output selector
• Buzzer register (BZCR)
Block Diagram of Buzzer Output
Buzzer register (BZCR)
– –
From timebase
timer
From watch
prescaler
F : Frequency of main clock source oscillation
CH
F : Frequency of sub-clock source oscillation
CL
Buzzer output selector
Selects one of the four frequencies (square waves) output from the timebase timer and three
frequencies output from the watch prescaler.
Buzzer register (BZCR)
The BZCR register is used to set the buzzer output frequency and enable buzzer output.
Buzzer output is enabled if an output frequency is specified (other than "000
register.
222

Figure 9.2-1 Block Diagram of Buzzer Output

Internal data bus
– – – BZ2 BZ1
12
2 /F
CH
2 11 /F
CH
2 10 /F
CH
Buzzer output
9
2 /F
CH
selector
2 5 /F
CL
4
2 /F
CL
3
2 /F
CL
BZ0
Select
Buzzer output
Buzzer output
enable signal
Pin
P33/BZ/(RCO)
") in the BZCR
B