Fujitsu F2MC-8L Series Hardware Manual page 26

Table 10.3-1 External Interrupt Circuit 1 Pins .............................................................................................. 233
Table 10.4-1 External Interrupt 1 Control Register 1 (EIC1) Bits ................................................................. 237
Table 10.4-2 External Interrupt 1 Control Register 2 (EIC2) Bits ................................................................. 238
Table 10.5-1 Register and Vector Table for External Interrupt Circuit 1 Interrupts ...................................... 240
Table 11.3-1 Terminals related to External Interrupt Circuit 2 Pins ............................................................. 249
Table 11.3-2 Correspondence between Interrupt Enable Bits and External Interrupt Pins ......................... 250
Table 11.4-1 Correspondence between External Interrupt 2 Control Register (EIE2) Bits and External Interrupt Pins
252
Table 11.4-2 Functions of External Interrupt 2 Control Register (EIE2) Bits ............................................... 253
Table 11.4-3 Functions of External Interrupt 2 Flag Register (EIF2) Bits .................................................... 254
Table 11.5-1 Register and Vector Table for External Interrupt Circuit 2 Interrupts ...................................... 255
Table 12.1-1 Watch Prescaler Interval Time ............................................................................................... 262
Table 12.1-2 Clock Signals Supplied from Watch Prescaler ....................................................................... 263
Table 12.3-1 Functions of Watch Prescaler Control Register (WPCR) Bits ................................................ 267
Table 12.4-1 Register and Vector Table for Watch Prescaler Interrupt ....................................................... 268
Table 13.1-1 Output Cycle and Variable "H" Width Ranges ........................................................................ 276
Table 13.1-2 Resolutions and Output Cycles of 6-bit PPG .......................................................................... 278
Table 13.1-3 Resolutions and Output Cycles of 6-bit PPG .......................................................................... 279
Table 13.4-1 Functions of Remote-control Transmission Frequency Control Register 1 (RCR1) Bits ........ 285
Table 13.4-2 Functions of Remote-control Transmission Frequency Control Register 2 (RCR2) Bits ........ 287
Table 14.1-1 Peripheral Control Clock Output Frequencies ........................................................................ 296
Table 14.3-1 Functions of Peripheral Control Clock Register (SCGC) Bits ................................................. 299
Table A-1 I/O Map ................................................................................................................................... 304
Table B-1 Instruction List Symbols .......................................................................................................... 307
Table B.1-1 Vector Table Addresses corresponding to "vct" ..................................................................... 311
Table B.3-1 Bus Operation for Bit Manipulation Instructions ..................................................................... 317
Table B.4-1 Transfer Instructions ............................................................................................................... 318
Table B.4-2 Arithmetic Operation Instructions ........................................................................................... 319
Table B.4-3 Branch Instructions ................................................................................................................. 321
Table B.4-4 Other Instructions ................................................................................................................... 322
Table B.4-5 Instruction List Columns ........................................................................................................ 322
Table B.5-1 F2MC-8L Instruction Map ....................................................................................................... 324
Table C-1 Mask Options List ................................................................................................................... 326
Table C-2 Standard Options ................................................................................................................... 327
Table C-3 Ordering Information ............................................................................................................... 327
Table D.1-1 ROM Programmer Adapter and Recommended ROM Programmers .................................... 329
Table D.1-2 PROM Option Bit Map ............................................................................................................ 332
Table D.2-1 Programming Socket Adapter ................................................................................................ 334
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