Figure 10.6-2 External Interrupt (Int0) Operation - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 (EDGE)
Input waveform
to the INT0 pin
EIR0 bit
EIE0 bit
SL01 bit
SL00 bit
IRQ0
Tip:
The pin state can be read directly from the port data register (PDR3), even when used as an
external interrupt input.
242

Figure 10.6-2 External Interrupt (INT0) Operation

Interrupt request flag bit
Cleared at the same time
as the EIE0 bit is set. cleared by the program.
Rising edge
Both edges
Falling edge