Figure 6.4-1 Watchdog Timer Clear And Interval Time - Fujitsu F2MC-8L Series Hardware Manual

8-bit microcontroller
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CHAPTER 6 WATCHDOG TIMER
Figure 6.4-1 shows the relationship between the watchdog timer clear timing and the interval
time when the timebase timer output is used as the count clock (at main clock oscillation of 4.2
MHz).
Minimum time
Maximum time
152

Figure 6.4-1 Watchdog Timer Clear and Interval Time

Count clock output of
the timebase timer
Watchdog clear
1-bit watchdog
counter
Watchdog reset
Count clock output of
the timebase timer
Watchdog clear
1-bit watchdog
counter
Watchdog reset
998.6 ms
Overflow
1997.2 ms
Overflow

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