Table 4.5-3 Port 3 Register Function - Fujitsu F2MC-8L Series Hardware Manual

Table 4.5-3 lists the functions of the port 3 registers.

Table 4.5-3 Port 3 Register Function

Register Data
0
Port 3 data
register
(PDR3)
1
0
Port 3 data
direction
register
(DDR3)
1
R/W:
W:
X:
Read
Sets "0" to the output latch.
Pin state is the Outputs an "L" level to the pin
"L" level. if the pin functions as an
output port.
Sets "1" to the output latch.
Pin state is the Outputs an "H" level to the pin
"H" level. if the pin functions as an
output port.
Sets the output buffer to "OFF"
and sets the pin as an input
Reading is not
pin.
permitted
Sets the output buffer to "ON"
(write-only).
and sets the pin as an output
pin.
Readable and writable
Write-only
Indeterminate
Read/
Write
Write
R/W
Address Initial value
000C XXXXXXXX
H
W 000D 00000000
H
4.5 Port 3
B
B
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