Figure 8.3-1 Block Diagram Of 8-Bit Serial I/O Pins - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 8 8-BIT SERIAL I/O
Block Diagram of 8-bit Serial I/O Pins
PDR
PDR read
PDR read
(for bit manipulation instructions)
PDR write
DDR write
SPL: Pin state specification bit in the standby control register (STBC)
Tip:
Pins with a pull-up resistor (optional) go to the "H" level during a reset or in stop or watch
mode (SPL="1").
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Figure 8.3-1 Block Diagram of 8-bit Serial I/O Pins

From output
(SO and SCK pins only)
(Port data register)
Output latch
DDR
(Port data direction register)
Stop or watch mode (SPL=1)
To input
(SI and SCK pins only)
From the output
enable bit
(SO and SCK
pins only)
Input buffer
Pull-up resistor
(optional)
Approx. 50 k /5.0 V
P-ch
P-ch
Pin
N-ch
P32/SI
P31/SO
P30/SCK