Watchdog Timer Control Register (Wdtc); Figure 6.3-1 Watchdog Timer Control Register (Wdtc); Table 6.3-1 Watchdog Timer Control Register (Wdtc) Bits - Fujitsu F2MC-8L Series Hardware Manual

6.3

Watchdog Timer Control Register (WDTC)

The watchdog timer control register (WDTC) is used to select the count clock and to
activate or clear the watchdog timer.
Watchdog Timer Control Register (WDTC)
Address Bit 7
0009 CS
H
R/W
R/W : Readable and writable
W : Write-only
— : Unused
X : Indeterminate
: Initial value
Note: As the register is write-only, the bit manipulation instructions cannot be used.
*1: F = Main clock oscillation
CH
*2: F = Subclock oscillation
CL

Table 6.3-1 Watchdog Timer Control Register (WDTC) Bits

Bit 7

Figure 6.3-1 Watchdog Timer Control Register (WDTC)

Bit 6 Bit 5 Bit 4 Bit 3
— — — WTE3
W
WTE3 WTE2
0 1
Other than the above
CS
0
Timebase timer output period(2
1 Watch prescaler output period(2
Bit
CS: Count clock
select bit
6.3 Watchdog Timer Control Register (WDTC)
Bit 2 Bit 1 Bit 0 Initial value
WTE2 WTE1 WTE0 0XXXXXXX
W W W
Watchdog timer control bits
WTE1 WTE0
• Activate the watchdog timer
(when writing for the first time after a
reset).
0 1
• Clear the watchdog timer
(when writing for the second and
subsequent times after a reset).
No operation
Count clock switch bit
22
/F
CH
14 /F
CL
Selects the watchdog timer count clock upon
activation of the watchdog timer. The count clock can
be the timebase timer or watch prescaler output.
Note:
To use subclock mode, be sure to select the watch
prescaler output. The count clock must be selected
at the same time as activation of the watchdog
timer. Once the watchdog timer has been
activated, do not change the count clock. Bit
manipulation instructions cannot be used.
B
*1)
*2)
Function
149