Figure 4.3-1 Block Diagram Of Port 1 Pin; Table 4.3-2 Correspondence Between Pins And Registers For Port 1 - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 4 I/O PORTS
Block Diagram of Port 1
SPL: Pin state specification bit in the standby control register (STBC)
Port 1 Registers
The port 1 registers consist of PDR1 and DDR1.
The individual bits in each register correspond to the port 1 pins on a one-to-one basis.
Table 4.3-2 shows the correspondence between the port 1 pins and the bits in the port 1
registers.

Table 4.3-2 Correspondence between Pins and Registers for Port 1

Port
PDR1, DDR1
Port 1
Corresponding pin
108

Figure 4.3-1 Block Diagram of Port 1 Pin

PDR (Port data register)
PDR read
PDR read (for bit manipulation instructions)
Output latch
PDR write
DDR
DDR write (Port data direction register)
Stop or watch mode (SPL=1)
Correspondence between register bit and pin
Bit 7 Bit 6
P17 P16
Stop or watch mode
(SPL=1)
Bit 5 Bit 4 Bit 3
P15 P14 P13
Pull-up resistor
(optional)
Approx. 50 k /5.0 V
P-ch
P-ch
Pin
N-ch
Bit 2 Bit 1
P12 P11
Bit 0
P10