Ucf Location Constraints; Related Resources - Xilinx Spartan-3E User Manual

Starter kit board
Table of Contents

Advertisement

R

UCF Location Constraints

Figure 6-4
assignment, the I/O standard used, the output slew rate, and the output drive current.

Related Resources

Spartan-3E Starter Kit Board User Guide
UG230 (v1.0) March 9, 2006
provides the UCF constraints for the VGA display port, including the I/O pin
NET
"VGA_RED"
LOC
= "H14" |
NET
"VGA_GREEN"
LOC
= "H15" |
NET
"VGA_BLUE"
LOC
= "G15" |
NET
"VGA_HSYNC"
LOC
= "F15" |
NET
"VGA_VSYNC"
LOC
= "F14" |
Figure 6-4: UCF Constraints for VGA Display Port
VESA
http://www.vesa.org
VGA timing information
http://www.epanorama.net/documents/pc/vga_timing.html
www.xilinx.com
UCF Location Constraints
IOSTANDARD
= LVTTL |
DRIVE
IOSTANDARD
= LVTTL |
DRIVE
IOSTANDARD
= LVTTL |
DRIVE
IOSTANDARD
= LVTTL |
DRIVE
IOSTANDARD
= LVTTL |
DRIVE
= 8 |
SLEW
= FAST ;
= 8 |
SLEW
= FAST ;
= 8 |
SLEW
= FAST ;
= 8 |
SLEW
= FAST ;
= 8 |
SLEW
= FAST ;
57

Advertisement

Table of Contents
loading

This manual is also suitable for:

Spartan-3e fpga

Table of Contents