Xilinx Spartan-3E User Manual page 159

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Example User Constraints File (UCF)
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### SPARTAN-3E STARTER KIT BOARD CONSTRAINTS FILE
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# ==== Analog-to-Digital Converter (ADC) ====
# some connections shared with SPI Flash, DAC, ADC, and AMP
NET "AD_CONV" LOC = "P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW
# ==== Programmable Gain Amplifier (AMP) ====
# some connections shared with SPI Flash, DAC, ADC, and AMP
NET "AMP_CS" LOC = "N7"
NET "AMP_DOUT" LOC = "E18" | IOSTANDARD = LVCMOS33 ;
NET "AMP_SHDN" LOC = "P7"
# ==== Pushbuttons (BTN) ====
NET "BTN_EAST" LOC = "H13" | IOSTANDARD = LVTTL
NET "BTN_NORTH" LOC = "V4"
NET "BTN_SOUTH" LOC = "K17" | IOSTANDARD = LVTTL
NET "BTN_WEST" LOC = "D18" | IOSTANDARD = LVTTL
# ==== Clock inputs (CLK) ====
NET "CLK_50MHZ" LOC = "C9"
# Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
NET "CLK_50MHZ" PERIOD = 20.0ns HIGH 40%;
NET "CLK_AUX" LOC = "B8"
NET "CLK_SMA" LOC = "A10" | IOSTANDARD = LVCMOS33 ;
# ==== Digital-to-Analog Converter (DAC) ====
# some connections shared with SPI Flash, DAC, ADC, and AMP
NET "DAC_CLR" LOC = "P8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW
NET "DAC_CS" LOC = "N8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW
# ==== 1-Wire Secure EEPROM (DS)
NET "DS_WIRE" LOC = "U4" | IOSTANDARD = LVTTL
# ==== Ethernet PHY (E) ====
NET "E_COL" LOC = "U6"
NET "E_CRS" LOC = "U13" | IOSTANDARD = LVCMOS33 ;
NET "E_MDC" LOC = "P9"
Spartan-3E Start Kit Board User Guide
UG230 (v1.0) March 9, 2006
| IOSTANDARD = LVCMOS33 | SLEW = SLOW
| IOSTANDARD = LVCMOS33 | SLEW = SLOW
| IOSTANDARD = LVTTL
| IOSTANDARD = LVCMOS33 ;
| IOSTANDARD = LVCMOS33 ;
| IOSTANDARD = LVCMOS33 ;
| IOSTANDARD = LVCMOS33 | SLEW = SLOW
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Appendix B
| DRIVE = 6 ;
| DRIVE = 6 ;
| DRIVE = 6 ;
| PULLDOWN ;
| PULLDOWN ;
| PULLDOWN ;
| PULLDOWN ;
| DRIVE = 8 ;
| DRIVE = 8 ;
| SLEW = SLOW | DRIVE = 8 ;
| DRIVE = 8 ;
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