Fpga I/O Banks 0 And 1, Oscillators - Xilinx Spartan-3E User Manual

Appendix A: Schematics

FPGA I/O Banks 0 and 1, Oscillators

IC10B0 represents the connections to I/O Bank 0 on the FPGA. The VCCO input to Bank 0
is 3.3V by default, but can be set to 2.5V using jumper JP9.
IC10B1 represents the connections to I/O Bank 1 on the FPGA.
IC17 is the 50 MHz clock oscillator.
IC16 is an 8-pin DIP socket to insert an alternate clock oscillator with a different frequency.
142
Chapter 3, "Clock Sources,"
www.xilinx.com
for additional information.
Spartan-3E Start Kit Board User Guide
UG230 (v1.0) March 9, 2006
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