Ucf Location Constraints; Related Resources - Xilinx Spartan-3E User Manual

Starter kit board
Table of Contents

Advertisement

Chapter 14: 10/100 Ethernet Physical Layer Interface
The hardware evaluation versions of the Ethernet MAC cores operate for approximately
eight hours in silicon before timing out. To order the full version of the core, visit the Xilinx
website at:

UCF Location Constraints

Figure 14-4
the I/O pin assignment and the I/O standard used.

Related Resources

112
http://www.xilinx.com/ipcenter/processor_central/processor_ip/10-100emac/
10-100emac_order_register.htm
provides the UCF constraints for the 10/100 Ethernet PHY interface, including
NET
"E_COL"
LOC
= "U6"
NET
"E_CRS"
LOC
= "U13" |
NET
"E_MDC"
LOC
= "P9"
NET
"E_MDIO"
LOC
= "U5"
NET
"E_RX_CLK"
LOC
= "V3"
NET
"E_RX_DV"
LOC
= "V2"
NET
"E_RXD<0>"
LOC
= "V8"
NET
"E_RXD<1>"
LOC
= "T11" |
NET
"E_RXD<2>"
LOC
= "U11" |
NET
"E_RXD<3>"
LOC
= "V14" |
NET
"E_RXD<4>"
LOC
= "U14" |
NET
"E_TX_CLK"
LOC
= "T7"
NET
"E_TX_EN"
LOC
= "P15" |
NET
"E_TXD<0>"
LOC
= "R11" |
NET
"E_TXD<1>"
LOC
= "T15" |
NET
"E_TXD<2>"
LOC
= "R5"
NET
"E_TXD<3>"
LOC
= "T5"
NET
"E_TXD<4>"
LOC
= "R6"
Figure 14-4: UCF Location Constraints for 10/100 Ethernet PHY Inputs
Standard Microsystems SMSC LAN83C185 10/100 Ethernet PHY
http://www.smsc.com/main/catalog/lan83c185.html
Xilinx OPB Ethernet Media Access Controller (EMAC) (v1.02a)
http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_ethernet.pdf
Xilinx OPB Ethernet Lite Media Access Controller (v1.01a)
The Ethernet Lite MAC controller core uses fewer FPGA resources and is ideal for
applications the do not require support for interrupts, back-to-back data transfers, and
statistics counters.
http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_ethernetlite.pdf
EDK 8.1i Documentation
http://www.xilinx.com/ise/embedded/edk_docs.htm
www.xilinx.com
|
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 ;
|
IOSTANDARD
= LVCMOS33 |
|
IOSTANDARD
= LVCMOS33 |
|
IOSTANDARD
= LVCMOS33 ;
|
IOSTANDARD
= LVCMOS33 ;
|
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 ;
|
IOSTANDARD
= LVCMOS33 ;
IOSTANDARD
= LVCMOS33 |
IOSTANDARD
= LVCMOS33 |
IOSTANDARD
= LVCMOS33 |
|
IOSTANDARD
= LVCMOS33 |
|
IOSTANDARD
= LVCMOS33 |
|
IOSTANDARD
= LVCMOS33 |
Spartan-3E Starter Kit Board User Guide
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
SLEW
= SLOW
|
DRIVE
= 8 ;
UG230 (v1.0) March 9, 2006
R

Advertisement

Table of Contents
loading

This manual is also suitable for:

Spartan-3e fpga

Table of Contents