Using Differential Outputs; Ucf Location Constraints - Xilinx Spartan-3E User Manual

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Using Differential Outputs

Differential input signals do not require any special voltage. LVDS and RSDS differential
outputs signals, on the other hand, require a 2.5V supply on I/O Bank 0. The board
provides the option to power I/O Bank 0 with either 3.3V or 2.5V.
highlights the location of jumper JP9.
If using differential outputs on the FX2 connector, set jumper JP9 to 2.5V. If the jumper is
not set correctly, the outputs switch correctly but the signal levels are out of specification.

UCF Location Constraints

Figure 15-7
assignment and the I/O standard used, assuming that all connections use single-ended
I/O standards. These header connections are shared with the 6-pin accessory headers, as
shown in
Spartan-3E Starter Kit Board User Guide
UG230 (v1.0) March 9, 2006
Figure 15-5: Location of Termination Resistor Pads on Bottom Side of Board
Signal
Figure 15-6: Differential Outputs
provides the UCF constraints for the FX2 connector, including the I/O pin
Figure 15-11, page 122.
www.xilinx.com
Hirose 100-pin FX2 Edge Connector (J3)
UG230_c12_05_022406
FPGA
PAD
LxxN_0
LxxP_0
UG230_c12_06_022406
Figure 15-1, page 113
119