Keithley 2461 Reference Manual page 1058

Appendix C: Status model
Status Byte Register diagram
The Status Byte Register consists of two 8-bit registers that control service requests, the Status Byte
Register and the Service Request Enable Register. These registers are shown in the following figure.
The bits in the Status Byte Register are described in the following table.
Decimal
Bit value
0
1
2
3
4 16
5 32
6 64
7 128
C-12
Figure 187: Model 2461 Status Byte Register
Bit name
1 Measurement summary Bit (MSB)
2 Not used
4 Error available (EAV)
8 Questionable summary bit (QSB)
Message available (MAV)
Event summary bit (ESB)
Request for service (RQS)/Master summary
status (MSS)
Operation summary bit (OSB)
Model 2461 Interactive SourceMeter® Instrument Reference Manual
When set, indicates the following
has occurred:
An enabled questionable event
Not applicable
An error is present in the error queue
(warning and information messages do
not affect this bit)
An enabled questionable event
A response message is present in the
output queue
An enabled standard event
An enabled summary bit of the Status
Byte Register is set; depending on
how it is used, this is either the
Request for Service (RQS) bit or the
Master Summary Status (MSS) bit
An enabled operation event
2461-901-01 A/November 2015