Common Device For Multiple Cpu (U3En\G) - Mitsubishi Q00JCPU User Manual

10
DEVICE EXPLANATION
10.5.2 Common device for multiple CPU (U3En\G )
Redundant
Note10.15
(1) Definition of common device for multiple CPU
(2) Features of common device for multiple CPU
(3) Specifying method and application example of common device for
Designation
method
Remark
Note16
Note16
Redundant
Note10.15
10
- 61 10.5 Module Access Devices

10.5.2 Common device for multiple CPU (U3En\G)

The common device for multiple CPU allows the CPU module to access the CPU
shared memory in each CPU module of a multiple CPU system.
The common device for multiple CPU allows the CPU module to access the CPU
shared memory in each CPU module of a multiple CPU system.
The features of the common device for multiple CPU are described below.
• The device allows transferring at a higher speed than writing (S.TO/TO
instruction)/reading (FROM instruction) of the CPU shared memory, reducing
steps used in the program.
• Using the common device for multiple CPU, bit operation can be performed.
• Setting device comments for the common device for multiple CPU can improve
program readability.
• Since this can directly specify the information on the CPU shared memory as an
argument of the instruction, the devices for interlock are not required.
multiple CPU
(a) Specifying method
The common device for multiple CPU is specified using the I/O number of a CPU
module and the CPU shared memory address.
\
CPU shared memory address (setting range: 0 to 4095 in decimal (10000 to 24335))*1
Starting I/O number of the CPU module
Setting : First 2 digits of starting I/O number expressed in 3 digits
Installation location of the CPU module
For CPU slot (No. 1)
For CPU slot 0 (No. 2)
For CPU slot 1 (No. 3)
For CPU slot 2 (No. 4)
Figure 10.56 Specifying method and application example of common device for multiple CPU
For details of the common device for multiple CPU, refer to the following manual.
QCPU User's Manual (Multiple CPU System)
The common device for multiple CPU is not available for the Redundant CPU.
Designation: 3E0
Designation: 3E1
Designation: 3E2
Designation: 3E3
*1: ( ) is only for the universal model QCPU.