Mitsubishi Q00JCPU User Manual
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Mitsubishi Q00JCPU User Manual

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  • Page 3: Safety Precautions

    SAFETY PRECAUTIONS (Always read these instructions before using this equipment.) Before using this product, please read this manual and the relevant manuals introduced in this manual carefully and pay full attention to safety to handle the product correctly. In this manual, the safety instructions are ranked as "DANGER" and "CAUTION". Indicates that incorrect handling may cause hazardous conditions, DANGER resulting in death or severe injury.
  • Page 4 [Design Precautions] DANGER Install a safety circuit external to the PLC that keeps the entire system safe even when there are problems with the external power supply or the PLC module. Otherwise, trouble could result from erroneous output or erroneous operation. (1) Outside the PLC, construct mechanical damage preventing interlock circuits such as emergency stop, protective circuits, positioning upper and lower limits switches and interlocking forward/ reverse operations.
  • Page 5 [Design Precautions] DANGER When overcurrent which exceeds the rating or caused by short-circuited load flows in the output module for a long time, it may cause smoke or fire. To prevent this, configure an external safety circuit, such as fuse. Build a circuit that turns on the external power supply when the PLC main module power is turned If the external power supply is turned on first, it could result in erroneous output or erroneous operation.
  • Page 6 [Installation Precautions] CAUTION Use the PLC in an environment that meets the general specifications contained in QCPU User's Manual (Hardware Design, Maintenance and Inspection). Using this PLC in an environment outside the range of the general specifications could result in electric shock, fire, erroneous operation, and damage to or deterioration of the product.
  • Page 7 [Wiring Precautions] DANGER Completely turn off the externally supplied power used in the system when installing or placing wiring. Not completely turning off all power could result in electric shock or damage to the product. When turning on the power supply or operating the module after installation or wiring work, be sure that the module's terminal covers are correctly attached.
  • Page 8 DANGER Be sure to ground the FG terminals and LG terminals to the protective ground conductor. Not doing so could result in electric shock or erroneous operation. Use applicable solderless terminals and tighten them with the specified torque.If any solderless spade terminal is used, it may be disconnected when the terminal screw comes loose, resulting in failure.
  • Page 9 [Startup and Maintenance Precautions] DANGER Do not touch the terminals while power is on. Doing so could cause shock or erroneous operation. Correctly connect the battery. Also, do not charge, disassemble, heat, place in fire, short circuit, or solder the battery. Mishandling of battery can cause overheating or cracks which could result in injury and fires.
  • Page 10 [Startup and Maintenance Precautions] CAUTION The online operations conducted for the CPU module being operated, connecting the peripheral device (especially, when changing data or operation status), shall be conducted after the manual has been carefully read and a sufficient check of safety has been conducted. Operation mistakes could cause damage or problems with of the module.
  • Page 11 [Disposal Precautions] CAUTION When disposing of this product, treat it as industrial waste. [Transportation Precautions] CAUTION When transporting lithium batteries, make sure to treat them based on the transport regulations. (Refer to Appendix 8 for details of the controlled models.)

  • Page 12: Revisions

    REVISIONS The manual number is given on the bottom left of the back cover. Print Date Manual Number Revision Jun., 2004 SH(NA)-080484ENG-A First edition Dec., 2004 SH(NA)-080484ENG-B Partial correction Section 3.1.3, 4.7.2, 6.7, 6.11.1, 6.12.2, 6.14, 6.17, 8.3, 9.13.1, 10.1.1, 10.1.2, 11.1.2, 11.1.3, 11.2.2, 11.2.3, 11.2.4, Appendix 1, Appendix 2, Appendix 3.1 May, 2005 SH(NA)-080484ENG-C...
  • Page 13 The manual number is given on the bottom left of the back cover. Print Date Manual Number Revision Apr., 2007 SH(NA)-080484ENG-H Universal model QCPU model addition, Revision involving High Performance model QCPU and Redundant CPU serial No.09012 Model addition Q02UCPU, Q03UDCPU, Q04UDHCPU, Q06UDHCPU, Q65WRB Addition Section 1.1.5, 5.2.3, 5.2.11, 6.25.1, 6.25.2, 6.29, 6.30, 9.6, 9.6.1, 9.6.2, Appendix 5...
  • Page 14 This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses. Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may occur as a result of using the contents noted in this manual.

  • Page 15: Table Of Contents

    INTRODUCTION Thank you for choosing the Mitsubishi MELSEC-Q Series of General Purpose Programmable Controllers. Before using the equipment, please read this manual carefully to develop full familiarity with the functions and performance of the Q series PLC you have purchased, so as to ensure correct use.
  • Page 16 3.3.2 Scan execution type program••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 33 3.3.3 Low speed execution type program ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 36 3.3.4 Stand-by type program ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 44 3.3.5 Fixed scan execution type program ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 49 3.3.6 Execution type setting and example of type changing ••••••••••••••••••••••••••••••••••••••••••••••• 3 - 57 Operation Processing ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••...
  • Page 17 5.1.5 Standard ROM program execution (boot run) and writing••••••••••••••••••••••••••••••••••••••••••• 5 - 12 High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU••••••• 5 - 16 5.2.1 Memory configuration and storable data•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 5 - 16 5.2.2 Program memory •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 5 - 20 5.2.3 Program cache memory (Universal model QCPU only) •••••••••••••••••••••••••••••••••••••••••••••...
  • Page 18 6.13 Execution Time Measurement•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 6 - 92 6.13.1 Program list monitor •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 6 - 92 6.13.2 Interrupt program monitor list ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 6 - 98 6.13.3 Scan time measurement ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 6 - 99 6.14 Sampling Trace Function •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 104 6.15 Multiple-user debugging function •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 120 6.15.1 Simultaneous monitoring execution by multiple users ••••••••••••••••••••••••••••••••••••••••••••••6 - 121 6.15.2 Simultaneous online change by multiple users•••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 124 6.16 Watchdog Timer (WDT) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 126...
  • Page 19 GX Developer Direct Connection (Simple Connection) ••••••••••••••••••••••••••••••••••••••••••••••••••• 7 - 10 MC Protocol Communication ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 7 - 12 Time Setting Function (SNTP Client) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 7 - 20 File Transfer Function (FTP)•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 7 - 23 Remote Password •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 7 - 44 CHAPTER8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8 - 1 to 8 - 11 Communication Between CPU Module and Intelligent Function Modules •••••••••••••••••••••••••••••••...
  • Page 20 10.4 Link direct device ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 54 10.5 Module Access Devices ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 59 10.5.1 Intelligent function module device (U\G) •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 59 10.5.2 Common device for multiple CPU (U3En\G) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 61 10.6 Index Register(Z) / Standard Device Resister(Z) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 62 10.6.1 Index Register (Z) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••10 - 62 10.6.2...
  • Page 21 CHAPTER12 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12 - 1 to 12 - 18 12.1 Basic Model QCPU ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 12 - 1 12.1.1 Items to be examined for program creation •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 12 - 1 12.1.2 Hardware check ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 12 - 2 12.1.3 Procedure for writing program ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••...

  • Page 22: Contents

    (Related manual)....QCPU User's Manual (Hardware Design, Maintenance and Inspection) CONTENTS CHAPTER1 OVERVIEW Features CHAPTER2 SYSTEM CONFIGURATION System Configuration 2.1.1 System Configuration for Single CPU System 2.1.2 System Configuration for Bus connection of GOT 2.1.3 Configuration of peripheral devices 2.1.4 Applicable Devices and Software 2.1.5 Precaution on system configuration CHAPTER3 GENERAL SPECIFICATIONS...
  • Page 23 Standards relevant to the EMC Directive 9.1.2 Installation instructions for EMC Directive 9.1.3 Cables 9.1.4 Power Supply Module and Q00JCPU's Power Supply Part 9.1.5 When Using MELSEC-A Series Modules 9.1.6 Others Requirement to Conform to the Low Voltage Directive 9.2.1 Standard applied for MELSEC-Q series PLC 9.2.2...
  • Page 24 10.3.2 Instructions for mounting the base unit 10.3.3 Installation and removal of module 10.4 How to Set Stage Numbers for the Extension Base Unit 10.5 Connection and Disconnection of Extension Cable 10.6 Wiring 10.6.1 The precautions on the wiring 10.6.2 Connecting to the power supply module CHAPTER11 MAINTENANCE AND INSPECTION 11.1...
  • Page 25 SP.SFCTCOMR instructions 12.2.24 Flowchart for when PARAMETER ERROR occurs at power ON/reset. 12.2.25 Flowchart for when the CPU cannot communicate with the GX Developer. 12.3 Error Code List 12.3.1 Error codes 12.3.2 CPU module errors 12.3.3 Error code list (1000 to 1999) 12.3.4 Error code list (2000 to 2999) 12.3.5...
  • Page 26 (Related manual)....QCPU User's Manual (Multiple CPU System) CONTENTS CHAPTER1 OUTLINE What is multiple CPU system? Configuration example of multiple CPU system Difference from single CPU system CHAPTER2 SYSTEM CONFIGURATION System configuration 2.1.1 System configuration using Basic model QCPU (Q00CPU, Q01CPU) 2.1.2 System configuration using High Performance model QCPU or Process CPU as CPU No.1 2.1.3...
  • Page 27 4.1.2 Communication by auto refresh using CPU shared memory 4.1.3 Communication by auto refresh using multiple CPU high speed transmission area 4.1.4 Communication using CPU shared memory by program 4.1.5 Communications between CPU modules when the error occurs Communications with instructions dedicated to Motion CPU 4.2.1 Control instruction from QCPU to Motion CPU Communication with Dedicated Instructions...
  • Page 28 APPENDICES Appendix 1 Transportation Precautions Appendix 1.1 Controlled models Appendix 1.2 Transport guidelines INDEX - 26...
  • Page 29 (Related manual)....QnPRHCPU User's Manual (Redundant System) CONTENTS CHAPTER1 OVERVIEW Redundant System Overview Features CHAPTER2 SYSTEM CONFIGURATION System Configuration Peripheral Device Configuration Applicable Devices and Software System Configuration Cautions CHAPTER3 TRACKING CABLE Specifications Part Names Connecting and Disconnecting a Tracking Cable CHAPTER4 PROCEDURE FOR STARTING UP A REDUNDANT SYSTEM Mounting Modules Wiring...
  • Page 30 FUNCTION LIST The System Switching Function 5.3.1 System Switching Method 5.3.2 System Switching Execution Timing 5.3.3 System Switching Execution Possibility 5.3.4 Both Systems Operations After System Switching 5.3.5 Special Relays/Registers For System Switching 5.3.6 System Switching Precautions Operation Mode Change Function Tracking Function 5.5.1 Tracking Function Overview...
  • Page 31 6.3.4 When Connecting GOTs to a Ethernet Precautions for Accessing Redundant CPU from Other Networks Precautions for Writing Device Data from Other Station CHAPTER7 PROGRAMMING CAUTIONS Instructions Restricted in Use for Redundant System Cautions on Fixed-scan Clocks and Fixed Scan Execution Type Programs Precautions for Using Annunciator (F) in Redundant System Precautions at System Switching Occurrence Precautions of Programming when Connecting Extension Base Unit...
  • Page 32 Extension of Scan Time due to Tracking System Switching Time APPENDICES Appendix 1 Comparison of Q4ARCPU and QnPRHCPU Appendix 2 Comparison of Qn(H)CPU and QnPRHCPU Appendix 3 Comparison of QnPHCPU and QnPRHCPU Appendix 4 Sample Programs when Using CC-Link Appendix 4.1 Sample Program System Configuration Appendix 4.2 Sample Program Names...

  • Page 33: About Manuals

    ABOUT MANUALS The following manuals are also related to this product. In necessary, order them by quoting the details in the tables below. Related Manuals (1) Common to CPU modules The following table indicates the related manuals common to the Basic model QCPU, High Performance model QCPU, Process CPU and Redundant CPU.
  • Page 34 (2) Basic model QCPU The following table indicates the related manuals of the Basic model QCPU other than the manuals indicated in "(1) Common to CPU modules". Manual Number Manual Name (Model Code) QCPU (Q Mode)/QnACPU Programming Manual (PID Control Instructions) SH-080040 This manual describes the dedicated instructions used to exercise PID control.
  • Page 35 (5) Redundant CPU The following table indicates the related manuals of the Redundant CPU other than the manuals indicated in "(1) Common to CPU modules". Manual Number Manual Name (Model Code) QnPRHCPU User's Manual (Redundant System) SH-080486ENG This manual explains the redundant system configuration, functions, communication with external devices, and (13JR76) troubleshooting for redundant system construction using the Redundant CPU.

  • Page 36: How To See This Manual Is Organized

    HOW TO SEE THIS MANUAL IS ORGANIZED CPU modules requiring Reference destination Chapter heading precautions A reference destination or The index on the right side of the page The CPU modules requiring precautions reference manual is marked shows the chapter of the open page at a are shown as icons.
  • Page 37 In addition, this manual provides the following explanations. POINT Explains the matters to be especially noted, the functions and others related to the description. Remark Provides the reference destination related to the description on that page and the convenient information. - 35...

  • Page 38: How To Use This Manual

    HOW TO USE THIS MANUAL This manual is prepared for users to understand memory map, functions, programs, and devices of the CPU modules required for the operation of the Q series programmable controller. This manual consists of several CHAPTERs as shown below. 1) CHAPTER 1 Describes the overview of the CPU modules.

  • Page 39: Generic Terms And Abbreviations

    QCPU User's Manual (Hardware Design, Maintenance and Inspection). Generic term for Q33B, Q35B, Q38B, and Q312B main base units on which CPU module (except Q00JCPU), Q series power supply module, I/O module and intelligent Q3 B function module can be mounted...
  • Page 40 Generic term for Q38DB and Q312DB type Multiple CPU high speed main base unit on which CPU module (except Q00JCPU), Q series power supply module, Q series I/O Q3 DB module and intelligent function module can be mounted...
  • Page 41 Generic term for Q2MEM-8MBA, Q2MEM-16MBA, and Q2MEM-32MBA type ATA card Memory card Generic term for SRAM card, Flash card and ATA card Generic term for Mitsubishi Graphic Operation Terminal GOT-A*** series, GOT-F*** series and GOT1000 series. PC CPU module MELSEC-Q series compatible PC CPU module of Contec makes...

  • Page 42: Chapter1 Overview

    The CPU modules described in this manual are as shown in Table1.1. Table1.1 List of CPU modules corresponding to the description of this manual CPU module Model name Basic model QCPU Q00JCPU, Q00CPU, Q01CPU Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, High Performance model QCPU Q25HCPU Process CPU...
  • Page 43 OVERVIEW (2) List of Q Series CPU Module manuals The Q series CPU module manuals are as shown below. For details such as manual numbers, refer to "About Manuals" in this manual. (a) Basic model QCPU Table1.2 List of user's manuals of basic model QCPU Maintenance Program Multi CPU...
  • Page 44 OVERVIEW Table1.3 List of programming manuals of basic model QCPU Process PID Control Structured Common Control MELSAP-L Text Instructions Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming...
  • Page 45 OVERVIEW (b) High Performance Model QCPU Table1.4 List of user's manuals of high performance model QCPU Maintenance Program Multi CPU Redundant Fundamentals System System Inspection QCPU User's Manual QCPU User's Manual QnPRHCPU User's (Hardware Design, QCPU User's Manual Purpose (Function Explanation, Manual (Redundant Maintenance and (Multiple CPU System)
  • Page 46 OVERVIEW Table1.5 List of programming manuals of high performance model QCPU Process PID Control Structured Common Control MELSAP-L Instructions Instructions Text Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming...
  • Page 47 OVERVIEW (c) Process CPU Table1.6 List of user's manuals of process CPU Maintenance Program Multi CPU Redundant Fundamentals System System Inspection QCPU User's Manual QCPU User's Manual QnPRHCPU User's (Hardware Design, QCPU User's Manual Purpose (Function Explanation, Manual (Redundant Maintenance and (Multiple CPU System) Program Fundamentals) System)
  • Page 48 OVERVIEW Table1.7 List of programming manuals of process CPU Process PID Control Structured Common Control MELSAP-L Instructions Text Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming QnACPU...
  • Page 49 OVERVIEW (d) Redundant CPU Table1.8 List of user's manual of redundant CPU Maintenance Program Multi CPU Redundant Fundamentals System System Inspection QCPU User's Manual QCPU User's Manual QnPRHCPU User's (Hardware Design, QCPU User's Manual Purpose (Function Explanation, Manual (Redundant Maintenance and (Multiple CPU System) Program Fundamentals) System)
  • Page 50 OVERVIEW Table1.9 List of programming manuals of redundant CPU Process Structured PID Control Common Control MELSAP-L Instructions Text Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QCPU (Q mode) QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) Programming Programming Programming Programming...
  • Page 51 OVERVIEW (e) Universal model QCPU Table1.10 List of user's manual of Universal model QCPU Maintenance Program Multi CPU Redundant Fundamentals System System Inspection QCPU User's Manual QCPU User's Manual QnPRHCPU User's (Hardware Design, QCPU User's Manual Purpose (Function Explanation, Manual (Redundant Maintenance and (Multiple CPU System) Program Fundamentals)
  • Page 52 OVERVIEW Table1.11 List of programming manuals of Universal model QCPU Process Common PID Control Structured Control MELSAP-L Instructions Instructions Text Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming...

  • Page 53: Features

    OVERVIEW 1.1 Features This section explains the features of the CPU modules. 1.1.1 Features of Basic model QCPU The features specific to the Basic model QCPU are described below. (1) Cost performance optimum for small-scaled system The Basic model QCPU is a module targeted for a small-scaled system and optimum for controlling a simple, compact system.
  • Page 54 OVERVIEW (2) Communication with personal computer and/or display device using serial communication function ( Section 6.24) The Q00CPU or Q01CPU can communicate with a personal computer and/or display device via the RS-232 interface in the MELSEC communication protocol (hereinafter the MC protocol). RS-232 cable Personal computer, display device...

  • Page 55: Features Of High Performance Model Qcpu

    OVERVIEW 1.1.2 Features of High Performance model QCPU The features specific to the High Performance model QCPU are described below. (1) High performance and large capacity The High Performance model QCPU is a module targeted for small-scaled to large- scaled systems and capable of high-speed massive data processing. The High Performance model QCPU realizes construction of the optimum and high- performance system.
  • Page 56 OVERVIEW (2) AnS/A series I/O modules and special function modules are available The AnS/A series compatible extension base units (QA1S6 B, QA6 B and QA6ADP+A5 B/A6 B) allow the High Performance model QCPU to use the AnS/A series I/O modules and special function modules. POINT New functions of a CPU module may be added depending on the upgrade of the serial number of the CPU module or the function version of GX Developer.

  • Page 57: Features Of Process Cpu

    OVERVIEW 1.1.3 Features of Process CPU The features specific to the Process CPU are described below. (1) Additional 52 process control functions Fifty-two instructions supporting high-leveled process controls have been added to the CPU based on the High Performance model QCPU. Refer to the following manual for details of the added instructions.
  • Page 58 OVERVIEW (4) Module can be replaced online (Online module change) When a module becomes faulty, it can be replaced without the system being stopped. Modules available for this are the Q series I/O modules, and the A/D converter modules, D/A converter modules, temperature input modules, temperature control modules and pulse input modules of function version C.

  • Page 59: Features Of Redundant Cpu

    OVERVIEW 1.1.4 Features of Redundant CPU The features specific to the Redundant CPU are described below. (1) Supporting redundant system in addition to the Process CPU functions (a) Redundant system using Redundant CPU With the Redundant CPU, a redundant system as a whole including base units, power supply modules, and CPU modules (Redundant CPUs) can be configured.
  • Page 60 OVERVIEW (b) Redundant power supply system Using the redundant power main base unit(Q3 RB) and the redundant power supply module (Q63RP and Q64RP) together with the remote I/O station, redundant power supply on the remote I/O station side can be realized. This enables the change of the power supply module without stopping the system even when the power supply module on the remote I/O station side fails.

  • Page 61: Features Of Universal Model Qcpu

    OVERVIEW 1.1.5 Features of Universal model QCPU The features specific to the Universal model QCPU are described below. (1) Realization of higher speed processing The Universal model QCPU speeds up the basic instruction processing time, floating point arithmetic processing time, and access processing time to file registers faster than other CPUs.
  • Page 62 OVERVIEW (5) Indexing in the range of 32-bit Indexing for entire area of the file register is possible by expanding the indexing range to 32 bits. Serial access format SM 400 file register DMOV K1042431 ZR0Z0 Use an index register (Z)when indexing an serial access format file register (ZR) in the range of 32-bit.
  • Page 63 OVERVIEW (c) MC protocol communication ( Section 7.4) • External devices such as personal computers and display devices read/write device data from/to the Built-in Ethernet port QCPU. This enables external devices to monitor the operation of the CPU module, analyze data, and manage production.

  • Page 64: Program Storage And Operation

    * 2 : The standard RAM is a memory used for the file registers. * 3 : The intelligent function module parameters set by GX Configurator are included. * 4 : The Q00JCPU does not have the standard RAM. The file registers are unavailable.
  • Page 65 OVERVIEW 2) High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU Program memory Parameter Program Parameter Program Device comments Device initial value Device comments Device initial value File register Local devices Standard ROM Parameter Program Failure history Sampling trance file Device comments Device initial value PLC user data...
  • Page 66 OVERVIEW (b) Program execution The CPU module operates the program stored in the program memory. Execution of program Program memory in program memory Parameter Program Device comments For program comment display Device initial value by GX Developer Figure 1.12 Execution of stored program Note1.2 (c) Execution of program stored in standard ROM/memory card Basic...
  • Page 67 OVERVIEW 2) High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU Universal Note1.3 To boot the program data to the program memory, make setting on the Note1.3 Boot file setting tab of PLC parameter in GX Developer and set the parameter- Note1.4 valid drive with DIP switches.
  • Page 68 OVERVIEW (2) Structured programs CPU module programs can be structured. A program can be created according to processes and functions by structuring it. As program structuring, structuring in the same program ( (2)(a) in this section) and file-divided structuring ( (2)(b) in this section) are available.
  • Page 69 OVERVIEW Basic Note1.5 (b) File-divided structuring Programs are stored in file format. *1 Note1.5 Changing the file name allows the CPU module to store multiple programs.Note4 * 1 : The program storage destination changes depending on the CPU module. CHAPTER 5) Multiple program writing is enabled by using different file names.
  • Page 70 OVERVIEW 2) When program is divided according to processes Program memory / Standard ROM / Memory card Ship in Program A Manufacturing Program B Program A to D are executed in Split by sequence. 2 process Assembly Program C Ship out Program D * 1 : The processings performed according to the processes can further be managed separately according to the functions.

  • Page 71: Devices And Instructions Convenient For Programming

    OVERVIEW 1.3 Devices and Instructions Convenient for Programming The CPU module has devices and instructions convenient for program creation. The main devices and instructions are outlined below. (1) Flexible device designation The Q series CPU modules allow devices to be specified flexibly. (a) Word device bits are handled as contacts/coils By specifying the bit of the word device, each bit of the word device can be handled as a contact/coil.
  • Page 72 OVERVIEW (c) Input need not be pulsed by use of differential contact An input need not be pulsed by use of a differential contact( Differential contact Y100 Y100 Y100 ON at leading Y100 edge of X0 Figure 1.22 Use of differential contact (d) Direct access to intelligent function module buffer memory The intelligent function module buffer memory can be handled as devices for programming.
  • Page 73 OVERVIEW (e) Direct access to link devices Access can be made to the link device (LX, LY, LB, LW, SB, or SW) of the CC-Link IE controller network module and the MELSECNET/H network module without the refresh setting.( Section 10.4) J5\W12 Link register J5\W12...
  • Page 74 OVERVIEW (2) Structural description of programs Using the index registers and edge relays, programs including pulse processing can be structured easily. ( Section 10.2.6) X0 X1 PLS M0 FOR n X10 X11 PLS M10 X0Z0 X1Z0 V0Z1 Y8Z2 n pieces of similar programs can be described at one time! X170 X171...
  • Page 75 OVERVIEW (b) High-speed processing of massive data The data processing instructions, such as the table processing instruction, have been reinforced to enable high-speed processing of massive data. FINSP FIF0 table FIF0 table Insertion Inserting source position Insertion designation Instruction for data insertion at table Figure 1.27 Data processing by table processing instruction (4) Flexible management of subroutine program...
  • Page 76 OVERVIEW (b) Subroutine call instructions with arguments A subroutine program called several time can be created easily by the subroutine call instructions with arguments. Main routine program Argument designation CALLP K4X0 Argument from FD2 Argument to FD1 Argument to FD0 Sub routine program designation Argument designation...

  • Page 77: Checking Serial Number And Function Version

    CPU modules. • Modules manufactured in mid-September, 2007 or earlier • Redundant CPUs manufactured in March 2008 or earlier • Q00JCPU 090911090910001-B Serial number Figure 1.31 Display on the front of the module...
  • Page 78 OVERVIEW (3) Checking on the System monitor screen (Product information list screen) To display the screen for checking the serial number and function version, select [Diagnostics] [System monitor] and click the Product Inf. List button in GX Developer. On the screen, the serial number and function version of intelligent function modules can also be checked.

  • Page 79: Chapter2 Performance Specification

    PERFORMANCE SPECIFICATION CHAPTER2 PERFORMANCE SPECIFICATION The table below shows the performance specifications of the CPU module. 2.1 Basic model QCPU Table2.1 Performance Specifications Basic model QCPU Item Q00JCPU Q00CPU Q01CPU Control method Sequence program control method Refresh mode I/O control mode (Direct access I/O is available by specifying direct access I/O (DX , DY ).)
  • Page 80 PERFORMANCE SPECIFICATION Table2.1 Performance Specifications Basic model QCPU Item Q00JCPU Q00CPU Q01CPU Program memory Memory card (RAM) ---- Memory Flash card ---- Max. number of card files stored ATA card ---- (ROM) Standard RAM ---- Standard ROM No. of times of writing data into the Max.
  • Page 81 PERFORMANCE SPECIFICATION Table2.1 Performance Specifications Basic model QCPU Item Q00JCPU Q00CPU Q01CPU 2048 points (S0 to 127/block) (The number of device points is fixed) Step relay [S] Index register [Z] 10 points (Z0 to 9) (The number of device points is fixed)

  • Page 82: High Performance Model Qcpu

    PERFORMANCE SPECIFICATION 2.2 High performance model QCPU Table2.2 Performance Specifications High performance model QCPU Item Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU Control method Sequence program control method Refresh mode I/O control mode (Direct access I/O is available by specifying direct access I/O (DX , DY ).) Sequence control Relay symbol language, logic symbolic language, MELSAP3 (SFC), MELSAP-L, function language...
  • Page 83 PERFORMANCE SPECIFICATION Table2.2 Performance Specifications High performance model QCPU Item Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU Program memory Memory card (RAM) 287 (When the Q2MEM-2MBS is used) Memory Flash card Max. number of card (ROM) ATA card files stored Standard RAM Standard ROM No.
  • Page 84 PERFORMANCE SPECIFICATION Table2.2 Performance Specifications High performance model QCPU Item Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU 32768 points(R0 to 32767) 32768 points(R0 to 32767) 32768 points Up to 65536 points can be used by Up to 131072 points can be used by Standard RAM (R0 to 32767) block switching in units of 32768...
  • Page 85 PERFORMANCE SPECIFICATION Table2.2 Performance Specifications High performance model QCPU Item Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU Special relay [SM] 2048 points (SM0 to 2047) (The number of device points is fixed) Special register [SD] 2048 points (SM0 to 2047) (The number of device points is fixed) Function input [FX] 16 points (FX0 to F) (The number of device points is fixed) Function output [FY]...

  • Page 86: Process Cpu

    PERFORMANCE SPECIFICATION 2.3 Process CPU Table2.3 Performance Specifications Process CPU Item Q02PHCPU Q06PHCPU Q12PHCPU Q25PHCPU Sequence program control method Control method (Direct access I/O is available by specifying direct access I/O (DX , DY )) I/O control mode Refresh mode Sequence control Relay symbol language, logic symbolic language, MELSAP3 (SFC), Program language...
  • Page 87 PERFORMANCE SPECIFICATION Table2.3 Performance Specifications Process CPU Item Q02PHCPU Q06PHCPU Q12PHCPU Q25PHCPU Program memory Memory card (RAM) 287(When the Q2MEM-2MBS is used) Memory card Flash card Max. number (ROM) ATA card of files stored Standard RAM Standard ROM No. of times of writing data into the standard Max.
  • Page 88 PERFORMANCE SPECIFICATION Table2.3 Performance Specifications Process CPU Item Q02PHCPU Q06PHCPU Q12PHCPU Q25PHCPU Up to 65536 points can be used by block Up to 131072 points can be used by block Standard RAM switching in units of 32768 points (R0 to switching in units of 32768 points (R0 to 32767).
  • Page 89 PERFORMANCE SPECIFICATION Table2.3 Performance Specifications Process CPU Item Q02PHCPU Q06PHCPU Q12PHCPU Q25PHCPU Special relay [SM] 2048 points (SM0 to 2047) (The number of device points is fixed) Special register [SD] 2048 points (SD0 to 2047) (The number of device points is fixed) Function input [FX] 16 points (FX0 to F) (The number of device points is fixed) Function output [FY]...

  • Page 90: Redundant Cpu

    PERFORMANCE SPECIFICATION 2.4 Redundant CPU Table2.4 Performance Specifications Redundant CPU Item Q12PRHCPU Q25PRHCPU Sequence program control method Control method (Direct access I/O is available by specifying direct access I/O (DX , DY )) I/O control mode Refresh mode (Programming by PX Developer) Sequence control Relay symbol language, logic symbolic language, MELSAP3 (SFC), language...
  • Page 91 PERFORMANCE SPECIFICATION Table2.4 Performance Specifications Redundant CPU Item Q12PRHCPU Q25PRHCPU Program memory Memory card (RAM) 287 (When the Q2MEM-2MBS is used) Memory card Flash card Max. number (ROM) ATA card of files stored Standard RAM Standard ROM No. of times of writing data into the standard Max.
  • Page 92 PERFORMANCE SPECIFICATION Table2.4 Performance Specifications Redundant CPU Item Q12PRHCPU Q25PRHCPU Standard RAM Up to 131072 points can be used by block switching in units of 32768 points (R0 to 32767). SRAM card (1M Up to 517120 points can be used by block switching in units of 32768 points (R0 to 32767). bytes) SRAM card (2M Up to 1041408 points can be used by block switching in units of 32768 points (R0 to 32767).
  • Page 93 PERFORMANCE SPECIFICATION Table2.4 Performance Specifications Redundant CPU Item Q12PRHCPU Q25PRHCPU Special relay [SM] 2048 points (SM0 to 2047) (The number of device points is fixed) Special register [SD] 2048 points (SD0 to 2047) (The number of device points is fixed) Function input [FX] 16 points (FX0 to F) (The number of device points is fixed) Function output [FY]...

  • Page 94: Universal Model Qcpu

    PERFORMANCE SPECIFICATION 2.5 Universal model QCPU Table2.5 Performance Specifications Universal model QCPU Item Q03UDCPU Q04UDHCPU Q06UDHCPU Q13UDHCPU Q26UDHCPU Q02UCPU Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q13UDEHCPU Q26UDHECPU Control method Sequence program control method I/O control mode Refresh mode (Direct access I/O is available by specifying direct access I/O (DX , DY )) Sequence control Relay symbol language, logic symbolic language, MELSAP3 (SFC), Program...
  • Page 95 PERFORMANCE SPECIFICATION Table2.5 Performance Specifications Universal model QCPU Item Q03UDCPU Q04UDHCPU Q06UDHCPU Q13UDHCPU Q26UDHCPU Q02UCPU Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q13UDEHCPU Q26UDHECPU Program memory 319 (When the Q3MEM-8MBS is used) Memory card (RAM) ( One file register, one local device and sampling trace file only) Max.
  • Page 96 PERFORMANCE SPECIFICATION Table2.5 Performance Specifications Universal model QCPU Item Q03UDCPU Q04UDHCPU Q06UDHCPU Q13UDHCPU Q26UDHCPU Q02UCPU Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q13UDEHCPU Q26UDHECPU 32768 points 32768 points 32768 points 32768 points 32768 points 32768 points (R0 to 32767) (R0 to 32767) (R0 to 32767) (R0 to 32767) (R0 to 32767) (R0 to 32767)
  • Page 97 PERFORMANCE SPECIFICATION Table2.5 Performance Specifications Universal model QCPU Item Q03UDCPU Q04UDHCPU Q06UDHCPU Q13UDHCPU Q26UDHCPU Q02UCPU Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q13UDEHCPU Q26UDHECPU 256 points (I0 to 255) Interrupt pointer [I] The constant cyclic interval of system interrupt pointers I28 to 31 can be set up by parameters. (0.5 to 1000ms, 0.5ms unit) Default values I28: 100ms, I29: 40ms, I30: 20ms, I31: 10ms Special relay [SM] 2048 points (SM0 to 2047) (The number of device points is fixed)
  • Page 98 PERFORMANCE SPECIFICATION Remark For the general specifications, refer to the following manual. QCPU User's Manual (Hardware Design, Maintenance and Inspection) - 20 2.5 Universal model QCPU...

  • Page 99: Chapter3 Sequence Program Configuration And Execution Conditions

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS CHAPTER3 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS There are three types of programs that can be executed in the CPU module: sequence program, SFC program, and ST program. This manual does not explain the SFC program and ST program. Refer to the following manuals for the SFC program and ST program.
  • Page 100 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Program execution order of High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU The High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU executes a program in the following order (Figure 3.2). Initial processing Execution order can be changed.

  • Page 101: Sequence Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1 Sequence Program Sequence program is a program created using sequence instructions, basic instructions, and application instructions. Sequence instruction K100 Basic instruction BIN K4X10 Application instruction FROM H5 Figure 3.3 Sequence program Remark Refer to the following manual for the sequence instructions, basic instructions and application instructions.
  • Page 102 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (1) Sequence program description method There are two different methods for describing sequence programs: ladder mode and list mode. (a) Ladder mode The ladder mode is a mode based on the concept of a sequence circuit of relay control.
  • Page 103 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Sequence program operation Program operation is executed sequentially from Step 0 to the END/FEND instruction. In the ladder mode, operation is performed from the left side vertical bus bar to the right end for each ladder block, and from the top rung to the bottom. [Ladder mode] [List mode] From left to right...
  • Page 104 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Sequence program classification Sequence programs are classified into the following three types. • Sequence programs are classified into the following three types. • Main routine program Section 3.1.1 • Subroutine program Section 3.1.2 •...

  • Page 105: Main Routine Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.1 Main routine programs (1) Definition of main routine program A main routine program is a program from Step 0 to the END/FEND instruction. (2) Execution operation of main routine program When the main routine program is executed, it operates as described below. (a) When only one program is executed The main routine program is executed from Step 0 to the END/FEND instruction, where END processing is performed.
  • Page 106 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Execution types for main routine programs Note3.2 Basic When multiple programs are to be executed, the following five different execution Note3.2 types can be set to main routine programs depending on the application.Note2 •...

  • Page 107: Subroutine Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.2 Subroutine programs (1) Definition of subroutine program A subroutine program is a program section from a pointer (P ) to the REET instruction. The subroutine program is executed only when it is called by a subroutine program call instruction (e.g.
  • Page 108 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Subroutine program management Subroutine programs are created after a main routine program (after the FEND instruction). Subroutine programs can also be managed as a single program. (a) Creating subroutine programs after main routine program 1) Location of creating subroutine programs Create subroutine programs between the FEND and END instructions of the Basic...
  • Page 109 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Restrictions on creation order When creating multiple subroutine programs, it is not necessary to set the pointer numbers in ascending order. 3) Available pointers Basic Local pointers and common pointers are available for subroutine Note3.5 programs.

  • Page 110: Interrupt Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.3 Interrupt programs (1) Definition of interrupt program An interrupt program is a program section from an interrupt pointer (I ) to the IRET instruction. Main routine program Indicates end of main routine FEND program.
  • Page 111 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT Basic Process Redundant 1. A pointer dedicated to the high-speed interrupt function (I49) is available as Note3.7,Note3.8 an interrupt pointer. Note3.7 Note3.7 Note3.7 Note7Note8 Universal When using I49, do not execute the following: •...
  • Page 112 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) IInterrupt program management Interrupt programs are created after the main routine program (after the FEND instruction). The interrupt programs can also be managed as a single program. (a) Creating interrupt programs after main routine program 1) Location of creating interrupt programs Create interrupt programs between the FEND and END instructions of the main routine program.
  • Page 113 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Note3.10 (b) Managing interrupt programs as another program Basic Interrupt programs can be managed as one program (stand-by type program). Note3.10 Section 3.3.4)Note10 (3) Before executing interrupt programs Before executing interrupt programs, execute the following instructions to enable the interrupts.
  • Page 114 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) When interrupt factor occurs There are restrictions on interrupt programs depending on the interrupt factor occurrence timing. (a) When interrupt factor occurs before interrupts are enabled The CPU module stores the interrupt factor that has occurred. As soon as interrupts are enabled, the interrupt program corresponding to the stored interrupt factor is executed.
  • Page 115 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (b) When interrupt factor occurs in STOP/PAUSE status When an interrupt factor occurs in the STOP/PAUSE status, the CPU module execute the interrupt program corresponding to the interrupt factor as soon as an interrupts are enabled after the CPU module status changes to RUN. STOP/PAUSE to RUN Interrupt factor...
  • Page 116 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) When multiple interrupt factors occur simultaneously in interrupt enable status The interrupt programs are executed in the order of descending preferences of their interrupt pointers (I ) .( Section 10.11) The other interrupt programs have to wait until the processing of the interrupt program being executed is completed.
  • Page 117 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) High Performance model QCPU, Process CPU or Redundant CPU • Interrupt factors of I0 to 27 and I50 to 255 are stored only once, and then the interrupt program of each stored interrupt factor is executed after completion of the current interrupt program execution.
  • Page 118 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Disable interrupt with DI instruction Disable the instructions that may cause inconvenience for the main routine program with the DI instruction. During access to the device of the corresponding argument of the instruction, Basic however, the interrupt program will not be inserted and therefore data Note3.11...
  • Page 119 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Remark Refer to the following manual for the block guarantee of cyclic data per station. CC-Link IE Controller Network Reference Manual Q Corresponding MELSECNET/H Network System Reference Manual (PLC to PLC network) Q Corresponding MELSECNET/H Network System Reference Manual (Remote I/O network) (g) Interrupt during END processing When the constant scan is set and an interrupt factor occurs during the wait time...
  • Page 120 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (7) Restrictions on programming Restrictions on interrupt programming will be explained. (a) Device turned ON/OFF by instruction such as PLS When using an instruction such as PLS, by which an execution condition turns ON from OFF in the next step and it turns the operation device ON, the device remains ON until the same instruction is executed.
  • Page 121 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) When interrupt/fixed scan execution type program is executed for execution time measurement, etc. Note3.13 When an interrupt/fixed scan execution type program is executed to Basic measure the scan time or execution time using special registers, the time for the Note3.13 program is added to the measured time.Note13...
  • Page 122 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU • Special registers SD520, SD521 : Current scan time SD522, SD523 : Initial scan time SD524, SD525 : Minimum scan time SD526, SD527 : Maximum scan time SD528, SD529 : Current scan time for low speed execution type Note3.14...

  • Page 123: Settings For Execution Of Only One Sequence Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.2 Settings for Execution of Only One Sequence Program A sequence program performs operation from Step 0 to the END/FEND instruction. It performs an END processing when the END/FEND instruction is executed. After the END processing, operation restarts from Step 0. As described above, the sequence program repeats the operation from Step 0 to the END/ FEND instruction.
  • Page 124 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Scan time watch The CPU module has scan time watch timers (watchdog timers).( (2) in this section) (2) WDT (Watchdog timer) The watchdog timer (hereafter abbreviated to the WDT) watches the scan time. The default value is 200ms.

  • Page 125: Settings For Creation And Execution Of Multiple Sequence Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3 Settings for Creation and Execution of Multiple Sequence Programs When multiple sequence programs are created, the execution type can be specified for Basic each program, e.g. a program started only once at startup or a program executed at fixed intervals.Note16 Note3.17 (1) Applications for multiple sequence programs creation...
  • Page 126 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Program storage location The programs executed by the CPU module can be stored into the following memories. • Program memory • Standard ROM • Memory card (4) Available execution types The following program execution types can be set on the CPU module. •...
  • Page 127 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.1 Initial execution type programNote18 Basic Note3.19 (1) Definition of initial execution type program An initial execution type program is executed only once when the PLC is powered ON or the STOP status is changed to the RUN status. The initial execution type program can be used for a program that need not be executed from the next scan or later once it is executed, e.g.

  • Page 128: Initial Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Initial execution type program processing (a) Execution sequence When the execution of all the initial execution type program is completed, an END processing is performed and a scan execution type program is executed at the next scan.
  • Page 129 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3) When interrupt program/fixed scan execution type program is executed When an interrupt program/fixed scan execution type program is executed before completion of the initial execution type program execution, the interrupt program/fixed scan execution type program execution time is added to the initial execution type program execution time.
  • Page 130 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for initial execution type program execution (a) Program Set the execution type to "Initial" in the program of the PLC parameter dialog box. When using multiple initial execution type programs, register them in the order of execution.

  • Page 131: Scan Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.2 Scan execution type programNote20 Basic Note3.21 (1) Definition of scan execution type program An scan execution type program is executed once for each scan, starting at the next scan after execution of the initial execution type program. STOP Power supply ON 1st scan...
  • Page 132 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Accuracy and measurement of scan time The accuracy of each scan time stored into the special registers is 0.1ms. Even if the watchdog timer reset instruction (WDT) is executed in a sequence program, the measurement of each scan time is continued. 3) Execution of multiple scan execution type programs When multiple scan execution type programs are executed, the scan execution type program execution time is the time taken until the execution of...
  • Page 133 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Settings for execution of scan execution type programs (a) Program Set the execution type to "Scan" in the program of the PLC parameter dialog box. When using multiple scan execution type programs, register them in the order of execution.

  • Page 134: Low Speed Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Basic 3.3.3 Low speed execution type programNote21 Note3.22 (1) Definition of low speed execution type program Redundant A low speed execution type program is executed only during the excess time of constant scan or the preset low speed program execution time. Note3.22 The low speed execution type program can be used for the program that need not be Universal...
  • Page 135 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (b) When there is excess time after completion of all low speed execution type program execution within one scan The processing performed after completion of low speed execution type program operation varies depending on the ON/OFF status of the special relay SM330 and low speed execution type program execution condition.
  • Page 136 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS When constant scan is set The following timing charts show the operations performed when low speed execution type programs are executed under the conditions given below. • Constant scan time : 8ms • Total execution time of scan execution type programs : 4 to 5ms •...
  • Page 137 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS When low speed program execution time is set The following timing charts show the operations performed when low speed execution type programs are executed under the conditions given below. • Low speed program execution time : 3ms •...
  • Page 138 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) When low speed execution type programs could not be processed within the excess time of constant scan or the low speed execution program execution time Program execution is suspended once and the remaining programs are executed at the next scan.
  • Page 139 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) Low speed scan time Low speed scan time is the sum of the execution time of all low speed execution type programs and the low speed END processing time. Refer to Figure 3.30 for differences between the low speed scan time and the scan time.
  • Page 140 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT When a low speed execution type program and an initial execution type program are to be executed, the low speed execution type program is executed after completion of the initial execution type program( Section 3.3.1).
  • Page 141 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for low speed execution type program execution (a) Program Set the execution type to "Low speed" in the program of the PLC parameter dialog box. When using multiple low speed execution type programs, register them in the order of execution.

  • Page 142: Stand-By Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.4 Stand-by type programNote22 Basic Note3.23 (1) Definition of stand-by type program A stand-by type program is executed only when its execution is requested. It can also be changed to another execution type by a sequence program instruction. (2) Applications of stand-by type program The stand-by type program is used in the following applications.
  • Page 143 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Stand-by type program execution method A stand-by type program can be executed in either of the following methods. • Create subroutine and/or interrupt programs in a stand-by type program and call them using a pointer or when an interrupt occurs. (3)(a) in this section) •...
  • Page 144 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 1) Operation of subroutine and interrupt programs in stand-by type program When the execution of the stand-by type program is finished, a program in the stand-by type program is called and its execution is resumed. Figure 3.40 shows the operation performed when the subroutine and interrupt programs in the stand-by type program is executed.
  • Page 145 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 1) Example of changing the execution type in scan execution type program • Set programs "ABC" and "GHI" as scan execution type programs. Set program "DEF" as a stand-by type program. • When the condition is satisfied (the internal relay (M0) in Figure 3.41 turns ON), "DEF"...
  • Page 146 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Timing for execution type change The program execution type is changed in the END processing. Hence, it is not changed midway through program execution. When different types are set to the same program in the same scan, it is changed to the execution type executed by the latest instruction.

  • Page 147: Fixed Scan Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.5 Fixed scan execution type program Basic Note3.25 (1) Definition of fixed scan execution type programNote24 This program is executed at the specified time intervals. It can be executed at fixed cycle intervals for each file without description of interrupt pointers and IRET instructions.
  • Page 148 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Execution during network refresh When the execution condition for the fixed scan execution type program is satisfied during network refresh, network refresh is suspended and the fixed scan execution type program is executed. Even if the cyclic data block has been assured for each station in the CC-Link IE controller network or the MELSECNET/H network system, it is not available when the device set as a refresh target is used in the fixed scan execution type...
  • Page 149 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (d) Execution during END processing When the constant scan is set and the execution condition for the fixed scan execution type program is established during the wait time in the END processing, the fixed scan execution type program is executed. Constant scan Fixed scan interval END processing...
  • Page 150 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) Index register processing Redundant Universal Refer to Section 10.6.4 for the index register processing when the program is switched from the scan execution type program/low speed execution type Note3.26 Note3.26 Note3.26 program to the fixed scan execution type program.Note25 (f) High speed execution setting and overhead time of fixed scan execution type program...
  • Page 151 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Precautions for programming (a) Device turned ON/OFF by PLS or similar instruction When using an instruction such as PLS, by which an execution condition turns ON from OFF in the next step and it turns the operation device ON, the device remains ON until the same instruction is executed.
  • Page 152 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) When interrupt/fixed scan execution type program is executed for execution time measurement, etc. When an interrupt/fixed scan execution type program is executed to measure scan time or execution time using special registers, the time of the above program is added to the measurement time.
  • Page 153 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (f) Execution interval of a fixed scan execution type program Note that the execution interval of a fixed scan execution type program may increase from the set interval depending on the time set for disabling interrupts by the DI instruction (interrupt disabled time).
  • Page 154 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for execution of fixed scan execution type program (a) Program Set the execution type to "Fixed scan" in the program setting of the PLC parameter dialog box. When using multiple fixed scan execution type programs, register them in the order of execution.

  • Page 155: Execution Type Setting And Example Of Type Changing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.6 Execution type setting and example of type changingNote27 Basic Note3.29 (1) Execution type setting Program setting necessary for executing multiple programs is explained in this section. Set the program execution type in the program of the PLC parameter dialog box of GX Developer.
  • Page 156 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 4) Stand-by type (Wait) This program is executed only when an execution is requested. Section 3.3.4) 5) Fixed scan execution type (Fixed scan) This program is executed at the time intervals set to "Fixed scan interval" and "Unit".( Section 3.3.5) •...
  • Page 157 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Note3.32 (d) I/O refresh setting Note30 Universal The CPU module updates the I/O of the I/O modules and intelligent function Note3.32 modules by block I/O refresh.( Section 3.8.1) When I/O refresh setting is performed, the I/O refresh in the specified range can be made for each set program.
  • Page 158 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Each program flow of CPU module Figure 3.54 shows each program flow in the case where the PLC is powered ON or the CPU module is switched from STOP to RUN. Note3.33 Redundant Universal Power supply OFF STOP...
  • Page 159 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Example of instruction-triggered execution type changing (a) Execution type changing instruction Using this instruction can change the execution type even during sequence program execution. Redundant Universal Note3.34 Use any of the PSCAN, PLOW ,PSTOP and/or POFF instructions to change the execution type.Note32...
  • Page 160 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT Once the fixed scan execution type program is changed to another execution type, it cannot be returned to the fixed scan execution type. (b) Example of execution type changing In a control program, the stand-by type program matching the preset condition is changed to the scan execution type program.

  • Page 161: Operation Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.4 Operation Processing This section explains the operation processing of the CPU module. 3.4.1 Initial processing Initial processing is a pre-processing to execute sequence operations. Initial processing is executed once when the actions described in Table3.4 are taken to the CPU module.

  • Page 162: I/O Refresh (I/O Module Refresh Processing)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT 1. The STOP, RUN and RESET switches of the CPU module are provided differently depending on the CPU module. • Switch of Basic model QCPU and Universal model QCPU RUN/STOP/RESET switch RUN/STOP/RESET switch RESET RESET STOP...

  • Page 163: End Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.4.4 END processing End processing is a post-processing to end the whole sequence program operation processing in one scan and to return the operation to step 0. (1) Operations of END processing The END processing includes the following. Table3.5 END processing list CPU modules performing END processing High...

  • Page 164: Run, Stop, Pause Operation Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.5 RUN, STOP, PAUSE Operation Processing CPU module has three types of operation status; RUN, STOP and PAUSE status. CPU module operation processing is explained below: (1) RUN Status Operation Processing RUN status is a status where the sequence program operations are repeatedly performed from step 0 to the END (FEND) instruction, and back to step 0.
  • Page 165 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) CPU module operation processing by switch operation Table3.6 Operation processing by switch operation CPU module operation processing Sequence Device memory RUN/STOP status program External output operation M,L,S,T,C,D processing Saves the output (Y) Saves the output (Y) Executes up to status immediately before Saves the device memory status...

  • Page 166: Operation Processing During Momentary Power Failure

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.6 Operation Processing during Momentary Power Failure When the input voltage supplied to the power supply module drops below the specified range, the CPU module detects a momentary power failure and performs the following operation.
  • Page 167 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) When momentary power failure occurs for a period longer than the permitted power failure time CPU module starts initially. The same operation processing as that after the following operation occurs. • Power ON •...

  • Page 168: Data Clear Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.7 Data Clear Processing This section explains how to clear the CPU module data and the settings about the latch data clearing. (1) Clearing data in the CPU module Data in the CPU module can be cleared when the reset operation with the RESET/ L.CLR switch (the RUN/STOP/RESET switch in the case of the Basic model QCPU and Universal model QCPU) is performed or when the power is switched from OFF to However, the data in (a) below cannot be cleared by the above operations.
  • Page 169 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Device latch specification Make the latch specification (latch range setting) for each device in the device setting of the PLC parameter dialog box of GX Developer.( Section 6.3(5)) (a) Latch range setting The latch range can be set by the following 2 methods using GX Developer. 1) Latch clear operation enable (Latch (1) first/last) Basic Universal...

  • Page 170: I/O Processing And Response Lag

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8 I/O Processing and Response Lag The CPU module performs I/O processing in a refresh mode. Using direct access I/O in a sequence program, however, allows the CPU module to perform direct mode I/O processing corresponding to each instruction. This section explains these I/O processing modes and response lags of the CPU module.

  • Page 171: Refresh Mode

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8.1 Refresh mode (1) Definition of refresh mode The refresh mode batch-accesses I/O modules before start of sequence program operation. Input of ON/OFF data by input refresh Device memory Output of ON/OFF data by output refresh ON/OFF data ON/OFF data...
  • Page 172 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Output The operation result in an output (Y) sequence program is output to the output (Y) device memory in the CPU module every time the operation is performed, and the ON/OFF data of the output (Y) device memory are batch-output to the output module before start of sequence program operation.
  • Page 173 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Response lag An output change lags a maximum of two scans behind an input module change depending on the ON timing of an external contact. Ladder examples Ladder that turns the Y5E output ON when an X5 input turns ON.

  • Page 174: Direct Mode

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8.2 Direct mode (1) Definition of direct mode The direct mode accesses an I/O module when each instruction is executed in a sequence program. Input of ON/OFF data at instruction execution Device memory Output of ON/OFF data at instruction execution ON/OFF data DX10...
  • Page 175 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS CPU module Remote network input refresh (operation module area processing area) Input Developer module Input (X) input area device memory Output (Y) Output device DY25 module memory • When an input contact instruction has been executed: The input module's input information 1) is ORed with GX Developer input area's input information 2) or remote input refresh area data, and the result is stored into the input (X) device memory.
  • Page 176 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Response lag An output change lags a maximum of one scan behind an input module change depending on the ON timing of an external contact. Ladder examples Ladder that turns the DY5E output DY5E ON when an DX5 input turns ON.

  • Page 177: Numeric Values Which Can Be Used In Sequence Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9 Numeric Values which can be Used in Sequence Programs Numeric and alphabetic data are expressed by "0" (OFF) and "1" (ON) numerals in the CPU module. This expression form is called "binary code" (BIN). The hexadecimal (HEX) expression form in which BIN data are expressed in 4-bit units, and the BCD (binary coded decimal) expression form are applicable to the CPU module.
  • Page 178 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (1) Numeric value input from outside to CPU module When setting a numeric value from an external digital switch or similar device to the CPU module, BCD (binary coded decimal) can be used as the same setting in DEC (decimal) by the method given in (b).
  • Page 179 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Numeric value output from CPU module to outside A digital display or similar device is available to externally display the numeric value operated by the CPU module. (a) How to output numeric value The CPU module performs operation in BIN.

  • Page 180: Bin (Binary Code)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.1 BIN (Binary Code) (1) Binary code Binary date is represented by 0 (OFF) and 1 (ON). Decimal notation uses the numerals 0 through 9. When counting beyond 9, a 1 is placed in the 10s column and a 0 is placed in the 1s column to make the number 10. In binary notation, the numerals 0 and 1 are used.
  • Page 181 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT To each bit of each register, a 2 value is assigned. Note that an unsigned (no sign) binary number (0 to 65535) cannot be used since the most significant bit is used for discrimination of sign (positive or negative). 1) When most significant bit is "0"...Positive 2) When most significant bit is "1"...Negative 3.9 Numeric Values which can be Used in Sequence Programs...

  • Page 182: Hex (Hexadecimal)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.2 HEX (Hexadecimal) (1) Hexadecimal notation In hexadecimal notation, 4 binary bits are expressed in 1 digit. If 4 binary bits are used in binary notation, 16 different values from 0 to 15 can be represented.

  • Page 183: Bcd (Binary Coded Decimal)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.3 BCD (Binary Coded Decimal) (1) BCD notation BCD (binary coded decimal) is a numbering system in which one digit of DEC (decimal) is expressed in BIN (binary). Though it uses 4-bit representation like hexadecimal notation, it dose not use letters to F Table3.11 shows the numeric expressions of BIN, BCD and DEC.

  • Page 184: Real Numbers (Floating-Point Data)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.4 Real numbers (Floating-point data) Real number data includes the single-precision floating-point data and the double-precision floating-point data. The Universal model QCPU can use the double-precision floating-point data. (1) Single-precision floating-point data (a) Internal expression of real number data The CPU module internal expression of received real number data is explained below.
  • Page 185 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (b) Calculation example Calculation examples are shown below (the nnnnn "X" indicates an X-system data expression). 1) Storing "10" (10) (1010) (1.01000..2 SignPositive to 0 Exponent part3 to 82 to (1000 0010) Mantissa(010 00000 00000 00000 00000) Therefore, the data expression will be 41200000 , as shown below.
  • Page 186 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Method and precautions for internal operation processing with double Note3.39 precision Note38 Basic Process Redundant The High Performance model QCPU permits selection of "Perform internal operation processing with double precision" or "Do not perform internal operation Note3.39 Note3.39 Note3.39 processing with double precision".
  • Page 187 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3) Applications and precautions The following explains the applications and precautions for the cases where internal operation processing is performed with double precision and not performed. • When internal operation processing is performed with double precision This option is used when accuracy is required to ensure compatibility with the conventional models.
  • Page 188 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS High Basic Performance Process (2) Double-precision floating-point data Note3.40 Note3.40 Note3.40 Note3.40 (a) Internal expression of real number data Redundant The following shows the internal expression of real number data dealt with the Universal model QCPU. Note3.40 Using four word deices, the real number data is expressed as follows: (exponent part)
  • Page 189 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (b) Calculation example Calculation examples are shown below (the nnnnn "X" indicates an X-system data expression). 1) Storing "10" (10) (1010) (1.01000..2 SignPositive to 0 Exponent part3 to 401 to (100 0000 0001) Mantissa( 0100 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 Therefore, the data expression will be 4014000000000000...

  • Page 190: Character String Data

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.10 Character String DataNote40 Basic Note3.41 (1) Character String Data Note3.41 The CPU module uses ASCII code data. (2) ASCII code character strings ASCII code character strings are shown in Table3.12. "00 " (NUL code) in Table3.12 is used at the end of a character string. Table3.12 ASCII code character strings Column b1 Low...

  • Page 191: Chapter4 I/O Number Assignment

    Q3 B, Q3 SB, Q3 RB, Q3 DB Q06UDEHCPU, Q13UDEHCPU, Q26UDEHCPU * 1 : The Q00JCPU is a CPU module integrated with a power supply module and a main base unit. It requires no power supply module and main base unit.

  • Page 192: Relationship Between No. Of Extension Stages And No. Of Slots

    Table4.2 Number of extension stages (extension base units) and numbers of slots Extension base unit Number of available slots CPU module Slim type main base unit (Number of extension stages) (Number of available modules) Q00JCPU 16 slots (modules) (2 stages) Q00CPU, Q01CPU 24 slots (modules) (4 stages) Q02CPU, Q02HCPU, Q06HCPU,...
  • Page 193 I/O NUMBER ASSIGNMENT (2) Precautions for the number of mounted modules Mount modules within the range of the allowed number of slots. Even if the total number of slots for a main base unit and extension base unit is greater than the number of available slots (for example, six 12-slot base units are used), no error will occur when modules are mounted in slots whose number is within a valid range.

  • Page 194: Installing Extension Base Units And Setting The Number Of Stages

    4.3 Installing Extension Base Units and Setting the Number of Stages The extension base units shown in Table4.3 are available. Table4.3 Available extension base units CPU module Available extension base unit Q00JCPU Q5 B,Q6 B,Q6 RB Q00CPU, Q01CPU Q5 B,Q6 B,Q6 RB, QA1S6 B, QA65B, Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU...
  • Page 195 I/O NUMBER ASSIGNMENT (1) Extension stage number setting and setting order When using extension base units for extension, set the extension stage numbers with the stage number setting connectors on the extension base units. Set the extension stage numbers in order of connection, starting from the extension base unit connected to the main base unit.
  • Page 196 I/O NUMBER ASSIGNMENT (2) Precautions for extension stage number setting (a) Extension stage number setting order Set the extension stage numbers consecutively. If any extension stage number is skipped in the auto mode( Section 4.4(1))of base unit assignment, 0 slot is set to the skipped stage and the number of empty slots does not increase.
  • Page 197 I/O NUMBER ASSIGNMENT (b) When the same extension stage number is set The same extension stage number cannot be set to multiple extension base units. Main base unit Q312B Slot number Power supply CPU module module Extension base unit Q68B Extension 1 The same extension stage number cannot be set!
  • Page 198 I/O NUMBER ASSIGNMENT (c) When connector pins are inserted into two or more positions or no connector pin is inserted Extension base units cannot be used with connector pins inserted in two or more positions. Also, they cannot be used without connector pins being inserted. Main base unit Q312B Slot number...
  • Page 199 I/O NUMBER ASSIGNMENT Basic Process Redundant (d) Extension position of using AnS/A series compatible extension base unit Note4.1 (QA1S6 B, QA6 B, QA6ADP+A5 B/A6 B) Note1 Note4.1 Note4.1 Note4.1 When using the Q5 B, Q6 B, QA1S6 B, QA6 B, and QA6ADP+A5 B/ Universal A6 B are used together, mount the Q5 B/Q6 B, QA1S6 B, QA6 B, and...

  • Page 200: Base Unit Assignment (Base Mode)

    Since the Q series CPU module occupies only the mountable slots of the base unit, only 3 slots are occupied when a 3-slot base unit is used. Note2 Basic Process Redundant For the Q00JCPU, Process CPU and Redundant CPU, slim type main base units are not available. Note4.2 Note4.2 Note4.2 Note3 - 10...
  • Page 201 I/O NUMBER ASSIGNMENT (a) For 3-slot base unit: 3 slots are occupied Main base unit Q33B Slot number Power supply CPU module 5 slots are not module occupied. Extension base unit Q63B 5 slots are not Q63B occupied. 5 slots are not occupied.
  • Page 202 I/O NUMBER ASSIGNMENT (b) For 5-slot base unit/Q00JCPU: 5 slots are occupied Main base unit Q35B Slot number Power supply CPU module 3 slots are not module occupied. Extension base unit Q65B 3 slots are not occupied. Figure 4.10 For 5-slot base units...
  • Page 203 I/O NUMBER ASSIGNMENT (d) For 12-slot base unit: 12 slots are occupied Main base unit Q312B Slot number Power supply CPU module module Extension base unit Q612B Figure 4.12 For 12-slot base units 4.4 Base Unit Assignment (Base Mode) - 13...
  • Page 204 I/O NUMBER ASSIGNMENT (2) Detail mode In Detail mode, set the number of mountable modules to each base unit in the I/O assignment setting of the PLC parameter dialog box. (a) Applications This mode can be used when matching the number of mountable modules with the number of modules (fixed to 8 slots) occupied by the AnS/A series base unit, for example.
  • Page 205 I/O NUMBER ASSIGNMENT 2) When the preset number of slots is less than the number of actually used slots The slots other than those designated are disabled. For example, when 8 slots are designated for a 12-slot base unit, the 4 slots on the right of the base unit are disabled.
  • Page 206 I/O NUMBER ASSIGNMENT (3) Setting screen and setting items for Base mode of GX Developer Figure 4.15 I/O assignment (a) Base model name Set the mounted base unit model name within 16 characters. CPU module does not use the designated model name. (It is used as a user's memo or for parameter printing) (b) Power model name Set the mounted power supply module model name within 16 characters.

  • Page 207: Definition Of I/O Number

    I/O NUMBER ASSIGNMENT 4.5 Definition of I/O Number I/O numbers indicate the addresses used in a sequence program to input or output ON/ OFF data between the CPU module and other modules. (1) Input and output of ON/OFF data Input (X) is used to input ON/OFF data to the CPU module, and output (Y) is used to output ON/OFF data from the CPU module.

  • Page 208: Concept Of I/O Number Assignment

    I/O NUMBER ASSIGNMENT 4.6 Concept of I/O Number Assignment 4.6.1 I/O numbers of base unit The CPU module assigns I/O numbers at power-on or reset. Figure 4.17 shows the example of the I/O number assignment when the base unit is set in Auto mode without I/O assignment.
  • Page 209 I/O No. on right of Redundant CPU (Slot 1) is X/Y0. Note4 Basic Basic Process Redundant For the Q00JCPU, Process CPU and Redundant CPU, slim type main base units are not available. Note4.3 Note4.3 Note4.3 4.6 Concept of I/O Number Assignment - 19 4.6.1 I/O numbers of base unit...
  • Page 210 I/O NUMBER ASSIGNMENT (3) Order of I/O number assignment for extension base units The I/O numbers for extension base units continue from the last number of the I/O number of the main base unit. The I/O numbers are assigned to the extension base units from left (I/O 0) to right consecutively as shown in Figure 4.18, in the order in which the setting connectors of the extension base unit are set.

  • Page 211: I/O Numbers Of Remote Station

    I/O NUMBER ASSIGNMENT 4.6.2 I/O numbers of remote station It is possible to allocate CPU module device input (X) and output (Y) to remote station I/O Basic modules and intelligent function modules and control the modules in the MELSECNET/H Note4.4 Note4.5 Note4.4 remote network...
  • Page 212 I/O NUMBER ASSIGNMENT (2) Precautions for using remote station I/O numbers (a) Setting in consideration of future extension When using the input (X) and output (Y) of the CPU module for the I/O numbers of remote stations, set them in consideration of extension of I/O modules and/or intelligent function modules on the CPU module side.( Figure 4.20) Input/output (X/Y)

  • Page 213: I/O Assignment Using Gx Developer

    I/O NUMBER ASSIGNMENT 4.7 I/O Assignment Using GX Developer This section describes the I/O assignment using GX Developer. 4.7.1 Purpose of I/O assignment using GX Developer The I/O assignment is set using GX Developer in the following cases. (1) Reserving points for the change in the future The number of points can be reserved in advance so that the I/O numbers do not need to be modified when the current module is changed to the one with the different number of occupied I/O points in the future.
  • Page 214 I/O NUMBER ASSIGNMENT POINT 1. The I/O assignment setting becomes valid when the PLC is powered OFF and then ON or the CPU module is reset. 2. The I/O assignment setting is necessary for changing the response time of the input modules and the switch of intelligent function modules. 3.

  • Page 215: Concept Of I/O Assignment Using Gx Developer

    I/O NUMBER ASSIGNMENT 4.7.2 Concept of I/O assignment using GX Developer In I/O assignment, the "Type (module type)", "Points (I/O points)" and "Start XY" (starting I/ O number) can be set for each slot of the base units. For example, to change the number of occupied I/O points of the designated slot, only the number of occupied I/O points can be designated.
  • Page 216 * 1 : Not available for the Q00JCPU. (Because the I/O points of the Q00JCPU are 256.) (e) Start XY (Used with CPU module) When the I/O number of each slot is changed, you should designate the head I/O number according to the change.
  • Page 217 I/O NUMBER ASSIGNMENT (2) Precautions for I/O assignment (a) Slot status after I/O assignment When I/O assignment setting has been made to a slot, that setting has precedence over the mounted module. 1) When the preset number of points is less than the number of I/O points of modules actually mounted The I/O points for actually mounted modules are decreased.
  • Page 218 I/O NUMBER ASSIGNMENT 5) Last I/O number In I/O assignment, set the last I/O number not to exceed the maximum value( CHAPTER 2)of the I/O points. An error ("SP. UNIT LAY ERR.") will occur if the last I/O number exceeds the maximum value of the I/O points.
  • Page 219 I/O NUMBER ASSIGNMENT (b) Precautions for automatic start XY assignment by CPU module When the start XY is not yet entered, the CPU module automatically assigns it. In the case of 1) or 2) below, therefore, the start XY setting of each slot may overlap the one assigned by the CPU module.

  • Page 220: Examples Of I/O Number Assignment

    I/O NUMBER ASSIGNMENT 4.8 Examples of I/O Number Assignment The following example shows I/O number assignment made when I/O assignment setting is performed using GX Developer. (1) When changing the number of points of an empty slot from 16 to 32 points: Reserve 32 points so that the I/O numbers of Slot No.
  • Page 221 I/O NUMBER ASSIGNMENT (b) I/O assignment with GX Developer Designate slot No. 3 to "32 points" at the "I/O assignment" tab screen of GX Developer. Select 32 points. (When the type is not selected, the type of the installed module will be selected.) Figure 4.25 I/O assignment (When changing points of empty Slot 3) (c) I/O number assignment after the I/O assignment with GX Developer Q38B...
  • Page 222 I/O NUMBER ASSIGNMENT (2) Changing the I/O number of slots Change the I/O number of an empty slot (slot No. 3) to X200 through 21F so that the I/ O numbers of slot No. 4 and later slots do not change when a 32-point input module is mounted to the empty slot (slot No.
  • Page 223 I/O NUMBER ASSIGNMENT (b) I/O assignment with GX Developer Designate the head I/O number of slot No. 3 to "200" and that of slot No. 4 to "70" at the "I/O assignment" tab screen of GX Developer. "200" is designated as the head I/O number.

  • Page 224: Checking The I/O Numbers

    I/O NUMBER ASSIGNMENT 4.9 Checking the I/O Numbers System monitor of GX Developer allows the check of the mounted modules of CPU module and their I/O numbers.( Section 6.20) - 34 4.9 Checking the I/O Numbers...

  • Page 225: Chapter5 Memories And Files Used In Cpu Module

    Device initial value Standard RAM CPU module File register CPU shared memory * 1 : The Q00JCPU does not have the standard RAM. File registers are unavailable. Figure 5.1 Data handled by Basic model QCPU (a) Program memory ( Section 5.1.2) A memory for storing programs required for operations in the Basic model QCPU.
  • Page 226 Refer to CHAPTER 2 for the number of storable file register points. * 4 : Any of sequence program, ST program and SFC program data is necessary. * 5 : The Q00JCPU does not have the standard RAM. * 6 : Set the area used by the system. ( Section 5.1.2(3)(b))

  • Page 227: Program Memory

    MEMORIES AND FILES USED IN CPU MODULE 5.1.2 Program memory (1) Definition of program memory The program memory is a memory for storing programs required for operations in the Basic model QCPU. The programs stored in the standard ROM are booted (read) to the program memory to perform operations.
  • Page 228 MEMORIES AND FILES USED IN CPU MODULE (b) Create a user setting system area When formatting the program memory, set the user setting system area capacity. 1) Do not create a user setting system area The program memory is formatted without the user setting system area being created.
  • Page 229 MEMORIES AND FILES USED IN CPU MODULE (c) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Program memory/Device memory" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 230 MEMORIES AND FILES USED IN CPU MODULE (4) Write to program memory To write data to the program memory, choose [Online] [Write to PLC] on GX Developer. Select "Program memory/Device memory" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 231: Standard Rom

    MEMORIES AND FILES USED IN CPU MODULE 5.1.3 Standard ROM (1) Definition of standard ROM The standard ROM is a memory for performing the boot operation in the Basic model QCPU. The programs stored in the standard ROM are booted (read) to the program memory Section 5.1.2) to perform operations.
  • Page 232 MEMORIES AND FILES USED IN CPU MODULE (4) Write to standard ROM To write data to the standard ROM, choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer. ( Section 5.1.5) POINT The file size has the minimum unit. ( Section 5.4.4) The occupied memory capacity may be greater than the actual file size.

  • Page 233: Standard Ram

    MEMORIES AND FILES USED IN CPU MODULE 5.1.4 Standard RAM (1) Definition of standard RAM The standard RAM is a memory for file registers. (Q00CPU and Q01CPU only) File registers in the standard RAM allow fast access like data registers. (2) Storable data The standard RAM can store one file of file register.
  • Page 234 MEMORIES AND FILES USED IN CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Standard RAM" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 235 MEMORIES AND FILES USED IN CPU MODULE (4) Write to standard RAM To write data to the standard RAM, choose [Online] [Write to PLC] on GX Developer. Select "Standard RAM" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 236: Standard Rom Program Execution (Boot Run) And Writing

    MEMORIES AND FILES USED IN CPU MODULE 5.1.5 Standard ROM program execution (boot run) and writing (1) Standard ROM program execution (boot run) (a) Standard ROM program execution The Basic model QCPU performs operation of the program stored in the program memory.
  • Page 237 MEMORIES AND FILES USED IN CPU MODULE 3) Write to standard ROM by GX Developer • Choose [Online] [Write to PLC] on GX Developer and write the files to the program memory. • Choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer, and write to the standard ROM the files written to the program memory.
  • Page 238 MEMORIES AND FILES USED IN CPU MODULE (2) Write to standard ROM The program memory files are written to the standard ROM by batch-copying them to the standard ROM. (a) Before write Check the following points before writing the files to the standard ROM. 1) Saving the standard ROM files When files are written to the standard ROM, all files previously stored in the standard ROM are automatically deleted.
  • Page 239 MEMORIES AND FILES USED IN CPU MODULE (3) Additions/changes to standard ROM files Since all files stored in the standard ROM are automatically deleted when files are to be written to the standard ROM, additions/changes to the stored files cannot be made directly.

  • Page 240: High Performance Model Qcpu, Process Cpu, Redundant Cpu, Universal Model Qcpu

    MEMORIES AND FILES USED IN CPU MODULE 5.2 High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU 5.2.1 Memory configuration and storable data This section explains the memories used in the High Performance model QCPU, Process CPU, Redundant CPU and Universal model QCPU, and the data can be stored in those memories.
  • Page 241 MEMORIES AND FILES USED IN CPU MODULE (a) Program memory ( Section 5.2.2)Note1 A memory for storing programs required for operations in the High Performance model QCPU, Process CPU, Redundant CPU, and Universal model QCPU. Universal Note5.1 The programs stored in the standard ROM and memory card are booted Note5.1 (read) to the program memory to perform operations.
  • Page 242 MEMORIES AND FILES USED IN CPU MODULE (2) Data that can be stored into memories Table5.4 indicates the data that can be stored into the program memory, standard RAM, standard ROM and memory cards and the corresponding drive Nos. Table5.4 Storable data and storage locations CPU module built-in Memory card Memory cards (ROM)
  • Page 243 MEMORIES AND FILES USED IN CPU MODULE (3) Memory capacities and formatting necessities Table5.5 shows the memory capacity and formatting necessity of each memory. Table5.5 Memory capacity and formatting necessity Formatting Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU 112kbytes 112kbytes 240kbytes 496kbytes 1008kbytes Program memory (28ksteps)

  • Page 244: Program Memory

    MEMORIES AND FILES USED IN CPU MODULE 5.2.2 Program memory (1) Definition of program memory The program memory is a memory for storing programs required for operations in the High Performance model QCPU, Process CPU, Redundant CPU, and Universal model QCPU. The Universal model QCPU transfers the program from the program memory to the program cache memory to perform operations.
  • Page 245 MEMORIES AND FILES USED IN CPU MODULE (b) Create a user setting system area When formatting the program memory, set the user setting system area capacity. 1) Do not create a user setting system area The program memory is formatted without the user setting system area being created.
  • Page 246 MEMORIES AND FILES USED IN CPU MODULE (c) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Program memory/Device memory" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 247 MEMORIES AND FILES USED IN CPU MODULE (4) Write to program memory To write data to the program memory, choose [Online] [Write to PLC] on GX Developer. Select "Program memory/Device memory" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 248: Program Cache Memory (Universal Model Qcpu Only)

    MEMORIES AND FILES USED IN CPU MODULE 5.2.3 Program cache memory (Universal model QCPU only) High Performance (1) Program cache memory overview Note5.3 The Universal model QCPU cannot boot programs from the standard ROM to the Process program memory. Note5.3 The Universal model QCPU transfers programs stored in the program memory to the Redundant program cache memory to perform operations.
  • Page 249 MEMORIES AND FILES USED IN CPU MODULE (2) Writing programs When executing the write to PLC operation from GX Developer, programs and parameters are written into the program cache memory of the CPU module once, and then transferred to the program memory after writing is completed. Figure 5.18 shows the flow of writing programs Universal model QCPU 2) Data is transferred to the program...
  • Page 250 MEMORIES AND FILES USED IN CPU MODULE (5) Checking the transfer status of data to a program memory Note5.4 Note4 Universal Transfer status from the program cache memory to the program memory can be checked by the special relay (SM165). Note5.4 Note4 When checking the transfer status to the program memory with a Universal model QCPU, check...

  • Page 251: Standard Rom

    MEMORIES AND FILES USED IN CPU MODULE 5.2.4 Standard ROM (1) Definition of standard ROM Universal The standard ROM is a memory for storing data such as parameters and programs. This memory can be specified as a storage drive of the boot source programs in the Note5.5 Note5.5 High Performance model QCPU, Process CPU, and Redundant CPU.
  • Page 252 MEMORIES AND FILES USED IN CPU MODULE (3) Checking the memory capacity To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Standard ROM" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 253 MEMORIES AND FILES USED IN CPU MODULE (4) Write to standard ROM The method of writing data to the standard ROM differs depending on the CPU module. (a) High Performance model QCPU, Process CPU or Redundant CPU • Choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer to batch-copy the program memory data to the...

  • Page 254: Standard Ram

    MEMORIES AND FILES USED IN CPU MODULE 5.2.5 Standard RAM (1) Definition of standard RAM The standard RAM is a memory for using file registers, local devices, and sampling trace files without installing a memory card. The standard RAM used as file registers allows fast access like the data registers. (2) Storable data The standard RAM can store one file register file, one local device file and one sampling trace file (a total of three files).
  • Page 255 MEMORIES AND FILES USED IN CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Standard RAM" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 256 MEMORIES AND FILES USED IN CPU MODULE (4) Write to standard RAM To write data to the standard RAM, choose [Online] [Write to PLC] on GX Developer. Select "Standard RAM" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 257: Memory Card

    MEMORIES AND FILES USED IN CPU MODULE 5.2.6 Memory card (1) Memory card A memory card is used to increase memory of the CPU module. Available memory cards are the SRAM card, Flash card and ATA card. (a) SRAM card The file register can be written/read to/from the SRAM card by a sequence program.
  • Page 258 MEMORIES AND FILES USED IN CPU MODULE (2) Storable data The following data indicated in Table5.8 can be stored into the memory cards. Table5.8 Data that can be stored into memory cards Memory card (RAM) Memory cards (ROM) Data name SRAM card Flash card ATA card...
  • Page 259 MEMORIES AND FILES USED IN CPU MODULE (3) Before using the SRAM or ATA card Before using the SRAM or ATA card, be sure to format it by GX Developer. (a) Formatting To format the program memory, choose [Online] [Format PLC memory] on GX Developer.
  • Page 260 MEMORIES AND FILES USED IN CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Memory card (RAM)" or "Memory card (ROM)" as the target memory on the Read from PLC screen.
  • Page 261 MEMORIES AND FILES USED IN CPU MODULE (4) Write to memory card The following explains the pre-write operation and the types of wriring methods. (a) Write to SRAM or ATA card To write data to the SRAM or ATA card, choose [Online] [Write to PLC] on GX Developer.
  • Page 262 MEMORIES AND FILES USED IN CPU MODULE (5) How to use the program stored in the memory card The programs stored in the memory card are booted (read) to the program memory to perform operations. ( Section 5.2.9) - 38 5.2 High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU 5.2.6 Memory card...

  • Page 263: Writing Data To Standard Rom And Flash Card Using Gx Developer

    MEMORIES AND FILES USED IN CPU MODULE 5.2.7 Writing data to standard ROM and Flash card using GX Developer (1) Methods and applications of writing data to the standard ROM and Flash card Figure 5.27 shows the methods of writing data to the standard ROM and Flash card. CPU module Program GX Developer...
  • Page 264 MEMORIES AND FILES USED IN CPU MODULE (2) Write to standard ROM or Flash card The following explains the pre-write operation and writing methods to the standard ROM or Flash card. (a) Before writing Check the following points before writing the files to the standard ROM or Flash card.
  • Page 265 MEMORIES AND FILES USED IN CPU MODULE 2) Using [Write to PLC (Flash ROM)] of GX Developer • Choose [Online] [Write to PLC (Flash ROM)] [Write to PLC (Flash ROM)] on GX Developer. • The Write to PLC (Flash ROM)screen appears. Figure 5.29 Write to PLC (Flash ROM)screen •...
  • Page 266 MEMORIES AND FILES USED IN CPU MODULE (4) Precautions (a) Setting the communication time check period ( "Check at communication time" ) in GX Developer Since long processing time is required for writing files to the standard ROM or Flash card, set the GX Developer's check at communication time to 60 seconds or more.
  • Page 267 MEMORIES AND FILES USED IN CPU MODULE (c) Time required for write to PLC (Flash ROM) Using the Write to PLC (Flash ROM) writes data over the entire space of the standard ROM or Flash card. Therefore, even if a program written to the Flash card has a small number of steps, long time will be taken until completion since data are written to the entire space of the Flash card.

  • Page 268: Automatic All Data Write From Memory Card To Standard Rom

    MEMORIES AND FILES USED IN CPU MODULE High 5.2.8 Automatic all data write from memory card to standard ROMNote9 Performance Note5.9 (1) Definition of automatic all data write from memory card to standard ROM The automatic all data write from memory card to standard ROM (hereafter Universal abbreviated to the automatic write to standard ROM) is the function that automatically Note5.10...
  • Page 269 MEMORIES AND FILES USED IN CPU MODULE (3) Execution procedure for automatic write to standard ROM Perform automatic write to standard ROM in the following procedure. (a) Operation on GX Developer (Setting of automatic write to standard ROM) 1) In the boot file setting of the PLC parameter dialog box, check "Clear the program memory"...
  • Page 270 MEMORIES AND FILES USED IN CPU MODULE 3) Set to the DIP switches of the High Performance model QCPU, Process CPU or Redundant CPU to positions indicating a parameter for valid drive. • When SRAM card is installed••••••• SW2 : ON,SW3 : OFF •...
  • Page 271 MEMORIES AND FILES USED IN CPU MODULE (4) Precautions The following provides the precautions for the automatic write to standard ROM. (a) When file of the same file name exists in the program memory When the program memory has a file whose name is the same as that of the file to be booted from the memory card, that file is overwritten by the file data of the memory card.

  • Page 272: Execution Of Standard Rom/Memory Card Programs (Boot Run)

    MEMORIES AND FILES USED IN CPU MODULE 5.2.9 Execution of standard ROM/memory card programs (boot run) Note5.11 This section explains how to operate the programs stored in the standard ROM Universal memory card. Note5.11 (1) How to execute the standard ROM/memory card programs The CPU module operates the programs stored in the program memory.
  • Page 273 MEMORIES AND FILES USED IN CPU MODULE (2) Types of files can be booted and a transfer source and transfer destination The file can be booted, its transfer source or transfer destination depends on the CPU module. The following table shows the executable combination for boot run. (a) High performance model QCPU, Process CPU, and Redundant CPU Table5.9 Available files for boot run Transfer source...
  • Page 274 MEMORIES AND FILES USED IN CPU MODULE (3) Procedure before boot run The following describes the procedure before boot run. (a) Program creation by GX Developer Create programs for boot run. (b) Boot file by GX Developer To execute the programs in the standard ROM or memory card, set the names of files to be booted (read) to the program memory in the boot file of the PLC parameter dialog box.
  • Page 275 MEMORIES AND FILES USED IN CPU MODULE (d) Installation of memory card When storing files to a memory card by boot run, install the memory card into the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU. (e) Writing parameters and programs by GX Developer 1) High Performance model QCPU, Process CPU, Redundant CPU Write the parameters to the memory set by the parameter-valid drive DIP...
  • Page 276 MEMORIES AND FILES USED IN CPU MODULE (4) Operation for stopping boot run To stop boot run and execute operation using the parameters and program files written to the program memory, perform the following operation by GX Developer. (a) High Performance model QCPU, Process CPU, or Redundant CPU 1) Write the parameters, which are not set as a boot file, to the program memory.
  • Page 277 MEMORIES AND FILES USED IN CPU MODULE Redundant Universal (5) Changing the program file during RUN Note5.13 Note11 Note5.13 Note5.13 (a) Changing method During RUN of the High Performance model QCPU, Process CPU or Universal model QCPU, files can be added, changed and deleted from the standard ROM or memory card to the program memory with the following instructions in a sequence program.
  • Page 278 MEMORIES AND FILES USED IN CPU MODULE (6) Precautions when executing the programs in the standard ROM/memory card (a) Parameter storage location 1) High Performance model QCPU, Process CPU and Redundant CPU When executing boot run, store the parameters (PLC parameters) specified in the boot file setting to the standard ROM or memory card.
  • Page 279 MEMORIES AND FILES USED IN CPU MODULE (c) Maximum number of boot files that can be set The maximum number of boot files that can be set in the boot file setting of the PLC parameter dialog box should be the same as the number of files that can be stored into the program memory.

  • Page 280: Details Of Written Files

    MEMORIES AND FILES USED IN CPU MODULE 5.2.10 Details of written files The file name, file size, written date and time, etc. set when creating a file by GX Developer are added to each file written to the CPU module. Choose [Online] [Read from PLC] on GX Developer and monitor the files.
  • Page 281 MEMORIES AND FILES USED IN CPU MODULE 3) File name in a sequence program How to specify a file name in a sequence program differs depending on the CPU module. • For High Performance model QCPU, Process CPU, and Redundant CPU Since the single-byte capital letters are distinguished from the single-byte small letters, specify the file name with capital letters.

  • Page 282: Specifying Valid Parameters (Parameter-Valid Drive Setting)

    MEMORIES AND FILES USED IN CPU MODULE 5.2.11 Specifying valid parameters (Parameter-valid drive setting) The parameter-valid drive setting function specifies the drive (memory) in which parameters to be valid are stored. The method for specifying the parameter-valid drive differs depending on the CPU module.
  • Page 283 MEMORIES AND FILES USED IN CPU MODULE (2) Universal model QCPU The system automatically determines and specifies the parameter-valid drive. Users cannot specify the parameter-valid drive. (a) Parameter-valid drive specification method The valid parameters are decided by the order of priority set to the drives where parameters are stored.
  • Page 284 MEMORIES AND FILES USED IN CPU MODULE (b) Valid parameter determination timing The valid parameters are determined at the following timing. • When the programmable controller is powered ON (at power ON) • When the reset operation of the CPU module is performed (at reset) The CPU module automatically searches for the parameters at the timing above, and operates with the parameter setting of the drive where the detected parameters are stored.
  • Page 285 MEMORIES AND FILES USED IN CPU MODULE Memo 5.2 High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU - 61 5.2.11 Specifying valid parameters (Parameter-valid drive setting)

  • Page 286: Program File Structure

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.3 Program File Structure A program file consists of a file header, execution program and allocate memory for online change. Program file structure 34 steps File header (By dafult) Execution program Area is secured in file size units. Section 5.4.4) Allocate memory 500 steps...
  • Page 287 MEMORIES AND FILES HANDLED BY CPU MODULE (2) Display of program capacity by GX Developer During programming by GX Developer, the program capacity (sum of the file header capacity and the numbers of steps in the created program) is displayed in terms of the number of steps as shown in Figure 5.43.

  • Page 288: File Operation By Gx Developer And Handling Precautions

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4 File Operation by GX Developer and Handling Precautions 5.4.1 File operation The file operations shown in Table5.14 can be performed for the files stored in the Note5.14 program memory, standard ROM or memory card by the online operation of GX Basic Developer.
  • Page 289 MEMORIES AND FILES HANDLED BY CPU MODULE Operability Operability Operability (Universal model (Process CPU) (Redundant CPU) QCPU) : Can be executed, : Can be executed on password match, : Cannot be executed * 1 : The following table indicates the meanings of the symbols in the operability field. Symbol Description When a write inhibit password is set to the file...

  • Page 290: Precautions For Handling Files

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4.2 Precautions for handling files (1) Power OFF (including reset) during file operation When the PLC is powered OFF or the CPU module is reset during any file operation, the files of the corresponding memory will be as described in Table5.14. Table5.14 File status at power OFF during file operation CPU module Memory status...

  • Page 291: Memory Capacities Of Files

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4.3 Memory capacities of files The sizes of the files used by the CPU module change depending on their types. This section indicates the memory capacities of the files for each CPU module. When files are written to the memory area, the units of the storage capacities change depending on the target CPU module and memory area.
  • Page 292 MEMORIES AND FILES HANDLED BY CPU MODULE (2) When High Performance model QCPU, Process CPU, Redundant CPU is used When using the program memory, standard RAM, standard ROM or memory card, calculate the rough size of each file according to Table5.16. Table5.16 Memory capacity calculation for files (High Performance model QCPU, Process CPU, Redundant CPU) Function Rough file capacity (unit: byte)
  • Page 293 MEMORIES AND FILES HANDLED BY CPU MODULE Table5.16 Memory capacity calculation for files (High Performance model QCPU, Process CPU, Redundant CPU) (Continued) Function Rough file capacity (unit: byte) 362 + (number of word device points + number of bit device points) 12 + (N1 +N2 + N3 + number of word device points 2 + (number of bit device points/16)
  • Page 294 MEMORIES AND FILES HANDLED BY CPU MODULE (3) When Universal model QCPU is used When using the program memory, standard RAM, standard ROM or memory card, calculate the rough size of each file according to Table 5.18 Table5.17 Memory capacity calculation for files (Universal model QCPU) Function Rough file capacity (unit: byte) Drive heading...
  • Page 295 MEMORIES AND FILES HANDLED BY CPU MODULE Table5.16 Memory capacity calculation for files (Universal model QCPU) (Continued) Function Rough file capacity (unit: byte) 362 + (number of word device points + number of bit device points) 12 + (N1 +N2 + N3 + number of word device points 2 + (number of bit device points/16) number of traces (total...

  • Page 296: File Size Units

    Table5.18 File size units of CPU modules (classified by memory areas) Memory area File size unit of program memory, Module name Standard standard ROM, Flash card Q00JCPU ---- 1 step/4 bytes Q00CPU, Q01CPU 4 byte Q02CPU, Q02HCPU, Q06HCPU 512 byte...
  • Page 297 MEMORIES AND FILES HANDLED BY CPU MODULE Basic Note5.17 (b) File size units classified by memory cards Note14 Note5.17 Table5.19 File size units (classified by memory cards) Type Memory card model name File size unit (cluster size) Q2MEM-1MBS 512 bytes Q2MEM-2MBS 1024 bytes SRAM card...
  • Page 298 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Memory capacity calculation The memory capacity is calculated on the basis of the file size unit of the write target CPU module. ( (1) in this section) The file size unit of the Q25HCPU in this example is 512 steps/2048 bytes according to (1) in this section.
  • Page 299 MEMORIES AND FILES HANDLED BY CPU MODULE 3) Calculation result Table5.21 Memory capacity calculation result File name File capacity Memory capacity 512 steps PARAM.QPA 564 bytes (2048 bytes) Sequence program capacity 525 steps Allocate memory for online 1536 steps MAIN.QPG 500 steps change (6144 bytes)
  • Page 300 MEMORIES AND FILES HANDLED BY CPU MODULE POINT The file size unit of the following CPU modules has been changed. • High Performance model QCPU whose first 5 digits of serial No. is "04122" or later. • Process CPU whose first 5 digits of serial No. is "07032" or later. Hence, note the following points.

  • Page 301: Chapter6 Functions

    FUNCTIONS CHAPTER6 FUNCTIONS This chapter explains the functions of the CPU module. 6.1 Function List Table6.2 lists the functions of the CPU module. The numbers in the "CPU module" column correspond to the CPU modules as indicated in Table6.1. Table6.1 Number in the "CPU module" column and corresponding CPU module CPU module Basic model QCPU High Performance model QCPU...
  • Page 302 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Item Description Reference Sets whether to clear or retain the output to the Q series compatible output modules, I/O combined Error time output mode setting modules, intelligent function modules, and interrupt Section 6.8 modules at the time of a stop error of the CPU module.
  • Page 303 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Item Description Reference Prohibits writing/reading data to/from each file in the Section Password registration CPU module using GX Developer. 6.19.1 Prevents illegal access from external sources with Section Remote password serial communication modules and Ethernet 6.19.2 modules.
  • Page 304 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Item Description Reference Replaces the Q series I/O module, the intelligent function module of function version C, or the I/O module or intelligent function module mounted on a Online module change MELSECNET/H remote I/O station or an extension base unit online.

  • Page 305: Constant Scan

    FUNCTIONS 6.2 Constant scan (1) Definition of Constant Scan The scan time differs because the processing time differs depending on whether the instruction, which is used in the sequence program, is executed or not. Constant scan is a function to execute the sequence program repeatedly while maintaining the scan time at a constant time.
  • Page 306 FUNCTIONS (3) Setting the constant scanning time The constant scanning time is set at the "PLC RAS" tab screen in the "(PLC) Parameter" dialog box. The constant scanning time can be set within the following range. • For Basic model QCPU 1 to 2000ms (set in 1ms unit) •...
  • Page 307 FUNCTIONS (a) Setting time condition As the constant scan time, set a value that satisfies the following relational expression. (WDT Set Time) > (Constant Scan Set Time) > (Sequence Program maximum Scan Time) If the sequence program scan time is longer than the constant scan setting time, the CPU module detects PRG.
  • Page 308 FUNCTIONS (4) Waiting time from when END processing is executed until next scan starts Sequence program processing is stopped during the waiting time from when the END processing of a sequence program is executed until the next scan starts. Note6.2 (a) When low speed execution type program is executed Note2 Basic...
  • Page 309 FUNCTIONS (5) Constant scan accuracy Refer to Section 11.2 for the constant scan accuracy. However, when the program indicated in (a) or (b) below is being executed, the constant scan may be delayed. Note6.4 (a) When low speed execution type program is executed Note3 Basic Redundant...

  • Page 310: Latch Function

    FUNCTIONS 6.3 Latch Function (1) Definition of Latch Functions The values of each High Performance model QCPU device are set back to the default (bit device: OFF and word device: 0) when; • The PLC is powered OFF and then ON •...
  • Page 311 FUNCTIONS (5) Latch range setting The latch range is set in the Device tab of the PLC parameter dialog box on GX Developer. The latch range can be set in two types: the latch clear operation enable range and the latch clear operation disable range. Figure 6.4 Latch range setting 6.3 Latch Function - 11...
  • Page 312 FUNCTIONS POINT The latch range of the file register (ZR), extended data register (D), and extended link register (W) can be set in the Universal model QCPU. The data outside the latch range is cleared by powering the programmable controller OFF ON or performing the reset operation of the CPU module.
  • Page 313 FUNCTIONS (6) How to hold latch range device data and influence on scan time (a) Basic model QCPU, High Performance model QCPU, Process CPU, and Redundant CPU Data is latched at the same time as the data is written to the devices in the latch range.
  • Page 314 FUNCTIONS (7) Clearing the Latch Range Device Data The status of devices to which "latch clear" is made is shown in Table6.3. Table6.3 Status when lath clear is performed Latch setting Clear/retention after "latch clear" Devices not specified to be within latch range Clear Latch (1) setting (Devices with "latch clear"...

  • Page 315: Setting Output (Y) Status When Changing Between Stop And Run

    FUNCTIONS 6.4 Setting Output (Y) Status when Changing between STOP and (1) Definition of Setting Output (Y) Status when Changing between STOP and RUN When changed from the RUN or other status to the STOP status, the CPU module stores the output (Y) in the RUN status into the PLC and turns all outputs (Y) OFF. Status when changing from STOP to RUN can be selected from the following two options with parameters in GX Developer.
  • Page 316 FUNCTIONS (3) Operation when changing from STOP status to RUN status (a) Output (Y) status prior to STOP is output (Default) After the output (Y) status before the STOP status is output, the sequence program calculations are performed. (b) Output (Y) is cleared The output (Y) is OFF status.
  • Page 317 FUNCTIONS (4) Setting the Output (Y) Status when Changing from STOP Status to RUN Status Set the output (Y) status when changing from the STOP status to the RUN status in the PLC system of the PLC parameter dialog box. Output mode at STOP to RUN Figure 6.10 PLC system screen...

  • Page 318: Clock Function

    FUNCTIONS 6.5 Clock Function (1) Definition of Clock Function The clock function reads the internal clock data of the CPU module to use it for time management. The clock data is used by the CPU module system to perform time management, e.g. storage of date into the error history.
  • Page 319 FUNCTIONS (4) Changing and reading the clock data (a) Changing the clock data The clock data can be changed either by GX Developer or program. 1) Method to write from GX Developer When using GX Developer, choose [Online] [Set time] to display the clock setting window, and change the clock data.
  • Page 320 FUNCTIONS (b) Reading Time Data When the time data is read to the data register, use either of the following instructions in the program. • Time data read instruction (DATERD) • Expanded time data read instruction (S(P).DATERD) The figure below shows an example of a program used to read the clock data with the DATERD instruction and then store it in D10 to D16.
  • Page 321 FUNCTIONS (5) Precautions (a) Initial clock data setting The clock data is not factory-set. The clock data is used by the CPU module system and intelligent function modules for error history, etc. When using the CPU module for the first time, be sure to set the precise time. (b) Clock data correction If part of the clock data is corrected, all data must be written to the CPU module again.
  • Page 322 FUNCTIONS (6) Accuracy of Clock Data The accuracy of the clock function differs with the ambient temperature, as shown below: Table6.7 Accuracy of Basic model QCPU Accuracy (Day difference, S) Ambient Temperature ( - 3.2 to + 5.27(TYP.+ 1.98) + 25 - 2.57 to + 5.27(TYP.+ 2.22) + 55 - 11.68 to + 3.65(TYP.- 2.64)

  • Page 323: Remote Operation

    FUNCTIONS 6.6 Remote Operation Remote operation is an operation to change operating status of the CPU module from the outside (GX Developer, external device using MC protocol, link dedicated instruction of the CC-Link IE controller network module or MELSECNET/H network module, and remote contacts) The following four options are available for remote operations: •...
  • Page 324 FUNCTIONS (4) Methods of performing remote RUN/STOP There are three methods for performing remote RUN/STOP. • Method with RUN contact • Method with GX Developer or external devices using MC protocol • Method with link dedicated instructions of the CC-Link IE controller network module or MELSECNET/H network module (a) Method with RUN contact The RUN contact is set at the PLC system tab screen in the (PLC) Parameter...
  • Page 325 FUNCTIONS (b) Method by GX Developer or external device using MC protocol RUN/STOP of the CPU module can be executed by performing remote RUN/ STOP operation with GX Developer or external device using MC protocol. Operate GX Developer by choosing [Online] [Remote operation].
  • Page 326 FUNCTIONS (5) Precautions Take note of the following, because STOP has priority in CPU module: (a) Timing of changing to STOP status The CPU module is put in the STOP status when remote STOP is executed from any of the followings: RUN contact, GX Developer and external device using MC protocol.

  • Page 327: Remote Pause

    FUNCTIONS 6.6.2 Remote PAUSE (1) Definition of Remote PAUSE The remote PAUSE performs PAUSE of the CPU module externally with the CPU module RUN/STOP switch (RUN/STOP/RESET switch for the Basic model QCPU and Universal model QCPU) at RUN position. In the PAUSE status, the CPU module operation is stopped with the ON/OFF states of all outputs (Y) held.
  • Page 328 FUNCTIONS POINT Setting of only the PAUSE contact is not allowed. When setting the PAUSE contact, also set the RUN contact. (b) Method with GX Developer, Serial Communication Module etc. The remote PAUSE operation can be performed from the GX Developer or by using serial communication module.
  • Page 329 FUNCTIONS (4) Precaution (a) When forcibly keeping output ON or OFF To forcibly keep the output ON or OFF in the PAUSE status, provide an interlock with the PAUSE contact (SM204). Y70 ON/OFF is determined with the ON/OFF of the M20 in the PAUSE SM204 status.

  • Page 330: Remote Reset

    FUNCTIONS 6.6.3 Remote RESET (1) Definition of Remote RESET The remote RESET resets the CPU module externally when the CPU module is in STOP status. Even if RUN/STOP switch (RUN/STOP/RESET switch for the Basic model QCPU and Universal model QCPU) is in RUN, the reset can be performed when the CPU module is stopped and an error that can be detected by the self-diagnosis function occurs.
  • Page 331 FUNCTIONS (4) Precautions (a) Setting for remote RESET To perform the remote RESET, check the "Allow" check box of the "Remote reset" section at the "PLC system" tab screen in the "(PLC) Parameter" dialog box, and then write parameters into CPU module. If the "Allow"...
  • Page 332 FUNCTIONS (e) When redundant system is configured using Redundant CPU In the backup mode, perform remote RESET for the control system, and then perform remote reset to reset both systems. In the separate mode or debug mode, perform remote RESET for only the system specified the connection target settings.
  • Page 333 FUNCTIONS 3) WDT error has occurred in standby system in backup mode If a WDT error has occurred in the standby system, the standby system is not reset when remote RESET is executed for the control system. In this case, perform remote RESET in the following path (communication path where the tracking cable is not relayed).

  • Page 334: Remote Latch Clear

    FUNCTIONS 6.6.4 Remote latch clear (1) Definition of Remote Latch Clear Remote latch clear resets the latched device data from GX Developer or similar device when the CPU module is in the STOP status. (2) Applications of remote latch clear Remote latch clear is useful when the CPU module is in the following areas.
  • Page 335 FUNCTIONS (c) Devices that are reset at execution of remote latch clear Devices that are not latched are cleared when the remote latch clear is performed. (d) When redundant system is configured using Redundant CPU 1) When both systems are not specified on remote operation screen Remote latch clear is performed for only the system specified in the connection target settings.

  • Page 336: Relationship Of Remote Operation And Cpu's Run/Stop Status

    FUNCTIONS 6.6.5 Relationship of remote operation and CPU's RUN/STOP status (1) Relationship of the Remote Operation and CPU module Switch The CPU module operation status is as shown in Table6.13 with the combination of remote operations to RUN/STOP switch. Table6.13 Relation between RUN/STOP status and remote operation Remote operation RUN/STOP status STOP...

  • Page 337: Q Series Compatible Module Input Response Time Selection (I/O Response Time)

    FUNCTIONS 6.7 Q Series Compatible Module Input Response Time Selection (I/O Response Time) (1) Input response time selection This function changes the input response times of each Q series corresponding module. Table6.14 indicates the modules of which input response time can be changed and the applicable setting times.
  • Page 338 FUNCTIONS (2) Input response time setting Set the input response time in the I/O assignment of the PLC parameter dialog box. 1) Make I/O assignment. 2) Select the button. Detailed setting 3) Set the input response time on the I/O module, intelligent function module detail setting screen.
  • Page 339 FUNCTIONS (3) Precautions (a) Restrictions on GX Developer version and the relevant modules When changing the input response time of the high-speed input module or interrupt module, use GX Developer version indicated in Table6.15. If GX Developer version earlier than the version indicated in Table6.15 is used, the module will operate with the default value of the input response time.

  • Page 340: Error Time Output Mode Setting

    FUNCTIONS 6.8 Error Time Output Mode Setting (1) Error time Output Mode Setting The error time output mode setting is to set whether the output to the Q series corresponding output module, I/O combined module, intelligent function module or interrupt module will be cleared or held when the CPU module results in a stop error. (2) Error time Output Mode Setting Make the error time output mode setting in the I/O assignment setting of the PLC parameter dialog box.

  • Page 341: Hardware Error Time Plc Operation Settings

    FUNCTIONS 6.9 Hardware Error Time PLC Operation Settings (1) Hardware Error time PLC Operation Mode Setting The hardware error time PLC operation mode setting is to set whether the operation of the CPU module will be stopped or continued when a hardware error occurs in the intelligent function module or interrupt module.

  • Page 342: Intelligent Function Module Switch Setting

    FUNCTIONS 6.10 Intelligent Function Module Switch Setting (1) Definition The intelligent function module/interrupt module switch setting is to set the switches of the Q series compatible intelligent function modules using GX Developer. (2) Timing when switch setting is written The specified switch setting is written from the CPU module to the corresponding intelligent function modules and interrupt modules when the PLC is powered on or the CPU module is unreset, i.e., CPU module's RESET switch is set to the neutral position.
  • Page 343 FUNCTIONS (3) Setting the Switches of the Intelligent Function Modules and Interrupt Modules At the "I/O assignment" tab screen in the "(PLC) Parameter" dialog box, specify the desired switch setting. Select "Intelli." in the "Type" column of a slot for which to set the switches of the intelligent function modules and interrupt modules.
  • Page 344 FUNCTIONS (4) Precautions Basic Note6.7 Process Redundant (a) When AnS/A series corresponding module is used Note7 In switch setting, do not set the AnS/A series corresponding module. Note6.7 Note6.7 Note6.7 An error ("SP. PARA. ERROR") will occur if switch setting is made to any AnS/A Universal series corresponding module.

  • Page 345: Monitor Function

    FUNCTIONS 6.11 Monitor Function (1) Definition of Monitoring Function This is a function to read the program, device and intellignet function module status of the CPU module by using GX Developer. Table6.16 Monitor function list and applicable CPU Applicability for CPU modules Monitor function Reference High...

  • Page 346: Local Device Monitor/Test

    FUNCTIONS (3) Monitor with monitor condition setting Note6.8 Note8 Basic Universal By setting the monitor condition on GX Developer for debugging, the CPU module Note6.8 Note6.8 operation status can be monitored under the specified condition. It is also possible to maintain the monitoring status under the specified conditions by setting the monitoring stop conditions.
  • Page 347 FUNCTIONS 6.11.1 Monitor condition settingNote10 Basic Note6.10 Note6.10 Set the monitor condition when executing monitor under the specified condition. Universal (1) Monitor execution condition setting for ladder monitor Note6.10 Choose [Online] [Monitor] [Monitor condition setup] to open the Monitor Condition dialog box. The following shows an example in which to start a monitoring operation at the leading edge of Y70.
  • Page 348 FUNCTIONS (a) When only "Step No." is specified: The monitor data sampled when the status previous to execution of the specified step becomes "the specified". The specification method for the execution status is indicated below: • When changing from non-execution status to executing status : < -P-> •...
  • Page 349 FUNCTIONS POINT 1 . If a step between the AND/OR blocks is specified as a monitor condition, monitor data is sampled when the status previous to execution of the specified step is specified by the LD instruction. The monitor timing depends on the step specified as a monitor condition.
  • Page 350 FUNCTIONS (b) When only Device is specified: Word Device or Bit Device can be specified. 1) When Word Device is selected: The monitor data is sampled is when the current value of the specified word device becomes the specified value. Type a current value in decimal digits or hexadecimal digits.
  • Page 351 FUNCTIONS (2) Monitor Stop Condition Set Up Choose [Online] [Monitor] [Monitor stop condition setup] to open the [Monitor Stop Condition] dialog box. Figure 6.34 shows an example of stopping a monitoring operation at the leading edge of Y71. Figure 6.34 Monitor stop condition screen (a) When "Step No."...
  • Page 352 FUNCTIONS (3) Precautions (a) Monitored CPU module file When monitoring after setting the monitor condition, the file displayed on GX Developer is monitored. Choose [Online] [Read from PLC] on GX Developer, and match the file name of the CPU module to be monitored with the file name on GX Developer. (b) When there is no file register setting When monitoring the file register which is not specified, 0 is displayed.
  • Page 353 FUNCTIONS (j) When executing monitor with monitor condition setting When executing monitor with monitor condition setting, other applications on the same personal computer cannot execute online functions using the same route used for monitor. The following applications must be noted. •...
  • Page 354 FUNCTIONS 6.11.2 Local device monitor/testNote11Note12 Basic Local devices specified at the Device tab screen in the (PLC) Parameter dialog box can be Note6.11 monitored or tested by operating from GX Developer. This function is useful when debugging a program and monitoring local devices in a program monitored by GX Developer.
  • Page 355 FUNCTIONS If the local device monitor setting is made and Program "B" is displayed, for example, this makes it possible to monitor the local devices in Program "B". CPU module Program execution (A MOVP K2 D0 Program: A MOVP K3 D99 MOVP K4 D0 Program: B MOVP K8 D99...
  • Page 356 FUNCTIONS (2) Monitoring the Local Devices Monitor local devices in the following steps: Connect the personral computer to the CPU module. Display the circuit in the circuit mode. Select [Online] [Monitor] Switching to the monitor [Monitor mode]. mode Select [Local device monitor] Setting of the local device from the monitor window.

  • Page 357: Forced On/Off For External I/O

    FUNCTIONS 6.11.3 Forced ON/OFF for external I/O High Performance The external I/O can be forcibly turned ON/OFF on the screen displayed by selecting Note6.12 [Online] [Debug] [Forced input output registration/cancellation] in GX Developer. The information registered for ON/OFF will be cancelled with GX Developer operations. Universal Note6.12 Figure 6.37 Forced input output registration/cancellation screen...
  • Page 358 FUNCTIONS (1) Operation when forced ON/OFF is registered This function can perform three operations: forced ON ("Set forced ON"), forced OFF Note6.13 ("Set forced OFF"), and forced ON/OFF cancellation ("Cancel it"). Note14 Basic Table6.18 shows the I/O operation when operations described above are performed. Note6.13 Table6.18 I/O operation when Forced ON/OFF function is executed Operation...
  • Page 359 FUNCTIONS Figure 6.38 shows the I/O operation when the Forced ON/OFF function is executed. Y10 device Output enforced ON/OFF operations enforced OFF Y10 output External output Output refreshed (OFF) (Y10 OFF) Input refreshed X0 input External input (ON) (X0 ON) Input enforced ON/OFF operations X0 device enforced OFF...
  • Page 360 FUNCTIONS (2) Explanation of specifications (a) Status of the CPU module for which forced ON/OFF is available Forced ON/OFF can be registered regardless of the status (RUN/STOP) of the CPU module. Note, however, that only input can be forcibly turned ON/OFF during a stop error. Output is performed only to device Y.
  • Page 361 FUNCTIONS Note6.15 Basic (d) Canceling ON/OFF registration data Note16 The registered forced ON/OFF data can be canceled using GX Developer. Note6.15 Once the registered data is canceled, the status of the forced ON/OFF registered devices will be as follows. Table6.19 Status of devices after forced ON/OFF registration data is canceled ON/OFF performed with ON/OFF not performed with Forced ON/OFF registered device...
  • Page 362 FUNCTIONS (e) Forced ON/OFF timing of external I/O Table6.20 shows the forced ON/OFF timing of external I/O. Table6.20 Forced ON/OFF timing Refresh area Input Output • During END processing (input • During END processing (output refresh) refresh) • During execution of the COM •...
  • Page 363 FUNCTIONS Basic Note6.16 (h) Checking forced ON/OFF registration and/or cancellation status The forced ON/OFF registration and/or cancellation (including no-setting) status Note6.16 can be checked using GX Developer. The MODE LED can be used for checking the status if at lease one device is Redundant Note6.17 registered.
  • Page 364 FUNCTIONS (3) Operation procedure Note6.18 Note20 Basic The operation procedure is explained below. Note6.18 • Register enforced ON/OFF for the specified device. [Online] [Debug] [Forced input output registration/cancellation] • It is possible to perform enforced ON or enforced OFF for a specified device by selecting [Set forced ON] or [Set forced OFF] after the device has been specified on the [Registration forced ON/OFF] setup screen.
  • Page 365 FUNCTIONS (4) Precautions for using the Redundant CPU (a) Systems to be registered/canceled When the Redundant CPU is used, register/cancel the enforced I/O for the control system. (Enforced I/O cannot be registered/canceled for the control system and standby system individually.) After system switching, register/cancel the enforced I/O for the new control system (system that was changed from the standby system to the control system by system switching).

  • Page 366: Executional Conditioned Device Test

    FUNCTIONS 6.11.4 Executional conditioned device test Universal Note6.19 This function changes a device value within the specified step of a sequence program. This enables debugging of the specified ladder block without modifying the sequence Basic program. Note21Note22 Note6.20 High * 1 : The Executional conditioned device test is targeted for sequence programs only. (SFC programs Performance are not supported.) Note6.20...
  • Page 367 FUNCTIONS (2) Specifiable devices and number of settable devices Table6.22 Specifiable devices and number of settable devices Type Specifiable device Number of settable devices X, Y, M, L, B, F, SB, V, SM, T (contact), ST (contact), C Bit device (contact), J \ X, J \ Y, J \ B, J \ SB, FX, FY, DX, and DY T (current value), ST (current value), C (current value), D SD, W...
  • Page 368 FUNCTIONS (4) Operation method (a) Registering executional conditioned device test settings Select the registration target step number on the program editing screen in GX Developer. Then, select [Online] [Debug] [Executional conditioned device test] [Register executional conditioned device test]. Figure 6.42 Screen for registering executional conditioned device test settings Table6.23 Items on the screen for registering executional conditioned device test settings Setting range Item...
  • Page 369 FUNCTIONS POINT 1. When setting a word device with a different value format, a device is regarded as the same device. [Example] When a word device is set in the following order, "D100 (16 bit integer)", and then "D100 (Real number (single precision))", "D100 (Real number (single precision))"...
  • Page 370 FUNCTIONS Note that there may be a case where a device value will not be changed depending on the execution timing even though the specified step is executed. The following instructions should be noted when registering executional conditioned device test setting. •...
  • Page 371 FUNCTIONS 4) Number of settings that can be registered simultaneously in one scan Eight executional conditioned device test settings can be registered into the CPU module simultaneously in one scan. When nine or more executional conditioned device test settings are to be registered simultaneously using a programming tool, they will be registered over multiple scans.
  • Page 372 FUNCTIONS (d) Checking executional conditioned device test settings Select [Online] [Debug] [Executional conditioned device test] [Check/ disable executional conditioned device test] in GX Developer. Figure 6.46 Screen for checking executional conditioned device test settings Remark 1. For the operation method of checking or disabling executional conditioned device test settings, refer to the following manual.
  • Page 373 FUNCTIONS (5) Precautions (a) Operating function from multiple GX Developer Executional conditioned device test setting can be registered in the same CPU module from multiple GX Developer connected via network. Note, however, that multiple executional conditioned device test settings are registered with the same device name in the same step, the registration data will be overwritten.
  • Page 374 FUNCTIONS 2) When the Online change (Write during RUN) is executed during execution of the Executional conditioned device test The Online change completes normally. If executional conditioned device test setting has been registered in the program to be changed online, the corresponding setting will be disabled.
  • Page 375 FUNCTIONS [Example 2] When multiple ladder blocks are targeted for the Online change, ladder blocks between the change target ladder blocks will be included in the change target. If the Online change shown in Figure 6.49 is executed, the registrations 1 to 3 are all disabled.
  • Page 376 FUNCTIONS (f) Device specification by index modification If index-modified device name is specified to register the executional conditioned device test setting, the module does not check whether the specified device is within the setting range. If the index-modified device is out of the device range or on the boundary of devices, a device value will not be changed within the specified step.

  • Page 377: Writing In Program During Cpu Module Run

    FUNCTIONS 6.12 Writing in Program during CPU Module RUN When the High Performance model QCPU is in the RUN status, you can write programs or files in any of the steps shown in Table6.27. Table6.27 Online change types CPU module Online change type •...
  • Page 378 FUNCTIONS Also, online change is enabled from GX Developer connected to another station on the network. GX Developer MELSECNET/H PLC to PLC network Change by GX Developer and write in CPU module at the conversion. Figure 6.52 Outline of online change via network (2) Memory enabled for online change (a) Basic model QCPU, High Performance model QCPU, Process CPU, and Redundant CPU...
  • Page 379 FUNCTIONS (4) The execution timing of low speed execution type program Note6.21 Note23 Basic Redundant Universal In the low speed execution type program, data are written online in the END Note6.21 Note6.21 Note6.21 processing of the next scan after completion of all the program execution. Note the execution of low speed execution type program is suspended during online change.
  • Page 380 FUNCTIONS (6) Changing the "allocate memory for online change" for online change The following explains the precautions for changing the "allocate memory for online change" for online change. (a) The allocate memory for online change A program file has steps secured for online change to support online change that changes the program file capacity.

  • Page 381: File-Write In Run

    FUNCTIONS 6.12.2 File-write in RUNNote26 Basic Note6.24 (1) File-Write in RUN function The file-write in RUN function is used to write a batch of files to the CPU module as shown in Table6.28. Table6.28 Files that can be written during RUN by the CPU module Memory CPU module built-in memories Memory Card (ROM)
  • Page 382 FUNCTIONS (2) Availability of writing a file during RUN (a) For the High Performance model QCPU, Process CPU, and Redundant CPU Table 6.24 shows the availability of writing a file during RUN. Table6.29 Availability of writing a file during RUN Free area greater than the program file to be written riting a file during RUN Program memory...
  • Page 383 FUNCTIONS (6) Writing a SFC program file in RUN Note6.25, Note6.26 Note27Note28 High Process Performance After writing SFC program file in RUN, the program starts from the beginning. Note6.25 Note6.25 Note6.27 (7) For the prohibited operations when writing data during RUN, when Universal changing T/C setting value, or at the time of transferring from a program cache memory to a program memory...

  • Page 384: Precautions For Online Change

    FUNCTIONS 6.12.3 Precautions for online changeNote29 The following shows precautions at the time of writing data during RUN. (1) Online change performed during boot run Operation is performed as described in Table6.30 when online change is performed during boot run.Note30 Table6.30 Status of boot source program when writing data during RUN Status of boot source program High Performance...
  • Page 385 FUNCTIONS (2) Operations prohibited during online change, TC setting value change or data transfer from the program cache memory to the program Process Basic Redundant memory Note6.30 Do not execute the following operations during online change, TC setting value Note6.30 Note6.30 Note6.30 change or data transfer from the program cache memory to the program memory.
  • Page 386 FUNCTIONS (3) Instructions do not operate normally at online change When online change is performed, the following instructions do not operate normally. • Trailing edge instruction • Leading edge instruction • SCJ instruction (a) Trailing edge instruction The trailing edge instruction is executed when the instruction is in a writing range even the execution condition(ON OFF) is not established at the completion of online change.
  • Page 387 FUNCTIONS (b) Leading edge instruction The leading edge instruction is not executed when the instruction is in a writing range even the execution condition(OFF ON) is established at the completion of online. Completion of online change [ PLS M0 ] 1 scan X0 status The leading edge instruction is not...
  • Page 388 FUNCTIONS POINT The event that the trailing edge instruction is executed even when the execution High condition (ON OFF) is not established after the completion of online change Basic Performance Process can be avoided by setting the "Instruction operational settings for online change/ Note6.31 file online change"...
  • Page 389 FUNCTIONS Figure 6.59 shows the trailing edge instruction operation based on the "Instruction operational settings for online change" setting in GX Developer. Completion of online Completion of online change [ PLF M0 ] [ PLF M0 ] change 1 scan 1 scan The trailing edge instruction is not The trailing edge instruction is not...
  • Page 390 FUNCTIONS (4) Precautions for using Universal model QCPU (a) Write to program memory during online change or TC setting value change Contents changed during online change or TC setting value change are transferred to the program memory automatically at the same time as data is written to the program cache memory.
  • Page 391 FUNCTIONS POINT 1. The automatic transfer to the program memory can be set to invalid in the Options dialog box of GX Developer. Data is not transferred to the program memory automatically by unchecking. Figure 6.60 Online change/TC setting value change program memory transfer settings screen 2.

  • Page 392: Execution Time Measurement

    FUNCTIONS 6.13 Execution Time Measurement (1) Definition This is a function to display the processing time of the program being executed. (2) Applications and types of execution time measurement This is used to find out the effect of each program's processing time on the total scan time.
  • Page 393 FUNCTIONS Note6.33 (a) Total Scan Time Note34 Basic Redundant Universal The monitor time set in WDT(the watchdog timer) of "PLC RAS" tab screen in the Note6.33 Note6.33 Note6.33 (PLC) "Parameter" dialog box and total scan time for each program type are displayed.
  • Page 394 FUNCTIONS (c) Execution status of each program The execution status of program specified at the Program tab screen in the (PLC) Note6.35 Parameter dialog box is displayed. Note36 Basic 1) Program Note6.35 The program name is displayed in the order set in the parameter. 2) Execute The program type set in the parameter is displayed.
  • Page 395 FUNCTIONS (3) Startup program Note6.36 Note37 Basic Universal Program can be started on the program list monitor screen. Note6.36 Note6.36 Clicking the button displays the following dialog box. Startup program Figure 6.62 Startup program screen (a) Program name Select the program set in the program setting of the PLC parameter dialog box. A program name cannot be entered as desired.
  • Page 396 FUNCTIONS (4) Stop program Note6.38 Note39 Basic Universal Program can be stopped on the program list monitor screen. Note6.38 Note6.38 Clicking the button on the program list monitor screen ( (2) in this Stop program section) displays the following dialog box. Figure 6.63 Stop program screen (a) Program name Select the program set in the program setting of the PLC parameter dialog box.
  • Page 397 FUNCTIONS POINT Depending on the instruction, the output may not turn OFF if "After stop, output stop" is executed. For details, refer to the section of the POFF instruction in the following manual. QCPU (Q Mode)/QnACPU Programming Manual (Common Instructions) (5) Precaution The scan time of a constant scan execution type program being executed is not displayed on screen, but a dash (-) is displayed in the Scan Time column.

  • Page 398: Interrupt Program Monitor List

    FUNCTIONS 6.13.2 Interrupt program monitor list (1) Definition of Interrupt Program Monitor List This function displays execution count of the interrupt program. This is used to confirm the execution status of the interrupt program. (2) Using the Interrupt Program Monitor List Choose [Online] [Monitor] [Interrupt program monitor list].

  • Page 399: Scan Time Measurement

    FUNCTIONS 6.13.3 Scan time measurement Basic Note6.40 (1) Definition of Scan Time Measurement This function displays the set program interval processing time.Note41Note42 Universal The time for the subroutines and interrupt program can be measured as well. Note6.41 (2) Scan time measurement range designation To specify a scan time measurement range, follow either of the following two steps: •...
  • Page 400 FUNCTIONS (5) Measuring Scan Time To measure scan time, follow the following steps. • Display the beginning of the ladder of which scan time will be measured, on GX Developer, select the monitor mode. • Choose [Online] [Monitor] [Scan time measurement] to open "Scan time Measurement screen"...
  • Page 401 FUNCTIONS Remark When the Scan time measurement screen is displayed after specifying the target rage in monitor mode, the start step and end step of the specified range are set in the Start step and End step fields. To specify the range in monitor mode, use the "Shift" key and click of a mouse. Figure 6.67 Measurement range designation (6) Precautions (a) Measurement range setting...
  • Page 402 FUNCTIONS (e) When scan time cannot be measured Scan time cannot be updated on the Scan time measurement screen in the following cases. • When branch instruction is specified for end step [Example] The JMP instruction is specified for the end step. Start step: 3 End step: 6 JMP P0...
  • Page 403 FUNCTIONS • When start step is executed continuously [Example] Only the start step is specified in the loop between the FOR and NEXT instructions. FOR K2 Start step: 8 The start step is executed continuously since it is specified in the loop between NEXT the FOR and NEXT instructions.

  • Page 404: Sampling Trace Function

    FUNCTIONS 6.14 Sampling Trace FunctionNote43 Basic Note6.42 (1) Definition of Sampling Trace Function?Note44 This function samples the device continuously on the High Performance model QCPU at specified timings. The sampling trace samples the contents of the specified device at a set interval (sampling cycle), and stores the trace results at the sampling trace file.
  • Page 405 FUNCTIONS POINT 1. The sampling trace file can be stored into only the standard RAM or SRAM card. ( Section 5.2.1(2)) 2. When the sampling trace file is stored into the standard RAM, check the version of CPU module and GX Developer.( Appendix 4) (a) When sampling trace is executed The execution status of the sampling trace function is stored in the special relay...
  • Page 406 FUNCTIONS (b) When sampling trace is completed After the sampling trace is completed, SM805 (sampling trace complete) is turned Trigger condition Trace ends by number enabled Trace start request of trace after trigger Number of trace after trigger Number of all traces SM800 (Sampling trace ready) SM801...
  • Page 407 FUNCTIONS (c) Sampling trace interrupt When SM801 (sampling trace start) is turned off during sampling trace, the sampling trace is interrupted. When sampling trace is interrupted, the number of traces is cleared. When turning on SM801 again, trace is restarted. SM801 SM801 Trigger...
  • Page 408 FUNCTIONS (4) Operation procedure The following methods are available as the sampling trace operation procedure. • Use the wizard ( GX Developer Operating Manual) • Make detailed settings individually. ( as follows) Perform each operation from the [Online] [Trace] [Sampling trace...] from the menu bar.
  • Page 409 FUNCTIONS (b) Setting the Trace Condition Click the button on the Sampling trace screen and set the Trace condition setting trace conditions. On the Trace condition setting screen, number of traces, trace point, trigger point, trace additional information, and auto start setting can be set. Figure 6.72 Trace condition setting 1) No.
  • Page 410 FUNCTIONS 2) Trace Point Setup This sets the timing to collect trace data. Select one from the following: • Each Scan Collects trace data for every scan (END processing). • Interval Collects trace data at specified times. • Per multiple CPU high speed transmission cycle (Universal model QCPU only) Data is collected in a cycle of 0.88ms specified interval of time.
  • Page 411 FUNCTIONS 3) Trace additional information The information to be added for every trace is set. Multiple items can be selected from the following (of none of the items have to be selected): • Time Stores the time when the trace was executed. •...
  • Page 412 FUNCTIONS (c) Trace data Setting Select "Individual setting/execution" on the Sampling trace screen. Click the button and set the devices to which sampling trace Trace data setting will be executed. Figure 6.74 Trace data setting screen 1) Bit Device Maximum of 50 bit devices can be set as follows. •...
  • Page 413 FUNCTIONS (d) Writing trace data settings and trace condition settings The created trace data settings and trace condition settings are written to the target memory set in [Trace data (setting + result) storage] as sampling trace file. Use the button on the Sampling trace screen to write the sampling Write to PLC trace file to the memory card (SRAM card).
  • Page 414 FUNCTIONS (e) Sampling trace execution Sampling trace can be executed in two ways: using GX Developer and using the auto start function. 1) Executing sampling trace using GX Developer Click the button on the Sampling trace screen to display the execute Execute sampling trace screen.
  • Page 415 FUNCTIONS Note6.43,Note6.44 2) Executing sampling trace using the auto start function Universal Check the box for "Auto start" on the Sampling trace setting wizard screen. Note6.43 High Basic Process Performance Note6.44 Note6.44 Note6.44 Redundant Note6.44 Figure 6.76 Screen for auto start setting When the check box for "Auto start"...
  • Page 416 FUNCTIONS (f) Trace result display Read the trace results form the CPU module and display the data. • Click the button on the Sampling trace execution Trace result PLC read screen to read the trace result from the CPU module. •...
  • Page 417 FUNCTIONS (5) How to clear [Trace execution] status Universal The [Trace execution] status can be cleared by latch clear using the RESET/L.CLR Note6.45 switch or the remote latch clear operation. When performing the sampling trace Note6.45 after latch clear, select [Start trace] or [Registry trace] before executing the sampling trace again.
  • Page 418 FUNCTIONS 2) When "Memory card (RAM)" is selected in target memory • When SRAM card registered the sampling trace file has not been mounted, the power supply is turned on (off to on), or CPU module was reset. • On the status sampling trace file corruption, the power supply was turned on (off to on), or CPU module is reset.
  • Page 419 FUNCTIONS (g) When file register is designated in designation device with detail setting of trace conditions When file register is designated in designation device with detail setting of trace point and trigger point setting, do not change block No. of file register file and file register after registry trace.

  • Page 420: Multiple-User Debugging Function

    FUNCTIONS 6.15 Multiple-user debugging function (1) Debug Execution by Multiple Users This function debugs from multiple GX Developers connected to such as CPU module or serial communication module. When a file has been divided according to the procedure or the function, the divided Basic Note6.47 files can be debugged from multiple GX Developers.

  • Page 421: Simultaneous Monitoring Execution By Multiple Users

    FUNCTIONS 6.15.1 Simultaneous monitoring execution by multiple users (1) Simultaneous monitoring execution by multiple users The CPU module, serial communication module or similar module can be simultaneously monitored by multiple GX Developer, when they are connected. Monitor target GX Developer GX Developer Figure 6.79 Simultaneous monitor Multiple users can monitor at the same time.
  • Page 422 FUNCTIONS (2) Operation Procedure For multi-user monitoring operation, create a user-defined system file in the following steps. • Choose [Online] [Format PLC memory] on GX Developer to display the PLC memory format window. • Select "Program memory/device memory" from the "Target Memory list box". •...
  • Page 423 FUNCTIONS (3) Precautions Basic Universal Note6.49 (a) Monitor condition setting Note51 Monitor condition setting can be made by only one GX Developer. Note6.49 Note6.49 (b) Necessity of system area setting If the user setting system area is not created, simultaneous monitor from other stations can be executed, but the monitor speed decreases.

  • Page 424: Simultaneous Online Change By Multiple Users

    FUNCTIONS 6.15.2 Simultaneous online change by multiple usersNote52 Basic Note6.50 (1) Simultaneous online change by multiple users This function enables multiple users to write to one or more files in RUN. When online change is performed to a single file by multiple users, select "Relative step No. by pointer".
  • Page 425 FUNCTIONS (b) Set Online change and set the Online change method. 1) Set Online change (while PLC is runnning) in "After conversion writing behavior". 2) Select Absolute step No. (default) or "Relative step No. by pointer" in "Step No. specification used in writing". (c) Online change execution •...

  • Page 426: Watchdog Timer (Wdt)

    FUNCTIONS 6.16 Watchdog Timer (WDT) (1) Definition of Watchdog Timer (WDT) The watchdog timer is an internal sequence timer to detect CPU module hardware and sequence program error. (2) Watchdog Timer Setting and Reset (a) Watchdog timer setting The watchdog timer setting can be changed at the "PLC RAS" tab screen in the "(PLC) Parameter"...
  • Page 427 FUNCTIONS (4) Precautions (a) Watchdog timer error An error of 0 to 10 ms occurs in the measurement time of the watchdog timer. Set the watchdog timer for a desired value by taking such an error into account. (b) Watchdog timer reset when program is executed repeatedly by FOR and NEXT instructions The watchdog timer can also be reset by executing the WDT instruction in a sequence program.
  • Page 428 FUNCTIONS (c) Scan time when WDT instruction is used The scan time value is not reset even if the watchdog timer is reset in the sequence program. The scan time value is measured to the END instruction. Internal Internal Sequence program processing time processing time Scan execution...

  • Page 429: Self-Diagnostics Function

    FUNCTIONS 6.17 Self-diagnostics Function (1) Definition of Self-Diagnosis Function The self-diagnosis is a function performed by the High Performance model QCPU itself to diagnose whether there is an error in the CPU module. The self-diagnosis function is used to prevent the CPU module erroneous operation as well as preventive maintenance.
  • Page 430 FUNCTIONS (4) Error history checking The CPU module stores 16 latest error codes. ( Section 6.18) The failure history can be checked in the GX Developer function PLC diagnostics mode. The failure history can be stored even when the power is shut off using the battery backup.
  • Page 431 FUNCTIONS (6) Selecting error check items Whether to execute an error check or not can be set for the following items on the PLC RAS setting tab of PLC parameter in GX Developer. (The default of all items is set to "Execute (with a checkmark in the checkbox)".) (a) Battery check ("Carry out battery check") (b) Fuse blown check ("Carry out fuse blown check") High...
  • Page 432 FUNCTIONS (7) Self-diagnostics list Table6.35 lists the self-diagnostics performed in the CPU module. The error messages in the "Error message" column can be checked on the screen displayed by selecting [Diagnostics] [PLC diagnostics] in GX Developer. The numbers in the "CPU module" column correspond to the CPU modules as indicated in Table6.34.
  • Page 433 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When the CPU module is powered on/reset • When FROM/TO instruction is executed Intelligent function Stop/ SP.UNIT DOWN • When intelligent OFF/ON Flash/ON Continue module error *...
  • Page 434 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When the END Stop/ Module comparison instruction is UNIT VERIFY ERR. Flash/ON Continue *1 *2 executed • When the CPU Base assignment error BASE LAY ERROR module is powered Stop Flash...
  • Page 435 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When the CPU module is powered on/reset Parameter setting PARAMETER • When switched from Stop Flash check ERROR STOP to RUN • When writing data to the programmable controller •...
  • Page 436 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When an OPERATION Stop/ *1 *6 instruction is OFF/ON Flash/ON Operation error ERROR Continue executed FOR to NEXT • When an FOR NEXT instruction structure instruction is Stop...
  • Page 437 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • Always • When the CPU module is powered on/ reset • When tracking cable is connected Program, • When switched to parameter, DIP FILE DIFF.
  • Page 438 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status Tracking cable • When the CPU TRK.CABLE fault, tracking module is Stop Flash ERR. hardware failure powered on/ reset Tracking cable not connected, failure, TRK.
  • Page 439 FUNCTIONS Table6.35 Self-diagnostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When the CPU Multiple CPU Multiple module is Stop Flash consistency error LAY.ERROR powered on/reset Other CPU minor MULTI CPU error • Always Continue error ERROR...

  • Page 440: Interrupt Due To Error Occurrence

    FUNCTIONS 6.17.1 Interrupt due to error occurrenceNote58 Basic Note6.56 The CPU module can execute the interrupt program of the interrupt pointer that is set as the interrupt object when an error occurs. Universal (1) Interrupt caused by the error that can be set to continue/stop in PLC Note6.56 RAS setting Only when the error set to "continue"...
  • Page 441 FUNCTIONS POINT The interrupt pointers I32 to 41 is at an execution disable mode when the power is started or CPU module is reset. When using I32 to 41, use the IMASK instruction and EI instruction to enable execution. Refer to the following manual for the IMASK instruction and EI instruction. QCPU (Q Mode)/QnACPU Programming Manual (Common Instructions) (3) Precautions when the Redundant CPU is used (a) Precautions for using the interrupt program of interrupt pointer I41...

  • Page 442: Led Display At The Time Of Error Occurrence

    FUNCTIONS 6.17.2 LED display at the time of error occurrence At the time of error occurrence, the LED located on the front of the CPU module turns on or flashes. ( Section 6.21) 6.17.3 Error Clear CPU module error clear operation can be performed only for error that can continue the CPU module operation.
  • Page 443 FUNCTIONS POINT 1. When error cancellation is performed by storing the code of the error to cancel is stored in SD50, the lower 2 digits of the code number is ignored. [Example] When the error codes 2100 and 2101 occur, canceling the error code 2100 will also cancel the error code 2101.

  • Page 444: Error History

    FUNCTIONS 6.18 Error History The CPU module can store the error history (results detected from the self-diagnosis function and the time) in the memory. The error history can be checked by choosing [Diagnostics] [PLC diagnostics] on GX Developer. POINT The detection time uses the CPU module internal clock, so make sure to set the correct time when using the CPU module for the first time.

  • Page 445: High Performance Model Qcpu, Process Cpu, Redundant Cpu, Universal Model Qcpu

    FUNCTIONS 6.18.2 High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU The storage area depends on the CPU module. (1) Storage Area (a) High Performance model QCPU, Process CPU, Redundant CPU The latest 16 errors are stored in the latched CPU module error history storage memory.

  • Page 446: System Protect

    FUNCTIONS 6.19 System Protect The CPU module has several protection functions (system protect) to prevent the programs being modified illegally by a third party other than the designer using GX Developer, serial communication module, and like. Table6.37 System protect types Valid Item to protect Protect valid file...

  • Page 447: Password Registration

    FUNCTIONS 6.19.1 Password registration Password is used to prohibit reading and writing data of the program and comments in CPU module from GX Developer. (1) Valid password range The read- and rewrite-prohibited range is set for the specified memory (program Note6.59 memory/standard memory/memory card) program file, device comment file and device initial...
  • Page 448 FUNCTIONS (3) Password registration Register the password on the Password registration/change screen of GX Developer. To display the Password registration/change screen, choose [Online] [Password setup] on GX Developer and click the button on the Write to PLC Password setup screen. Figure 6.86 Password registration/change screen Each item is described below: (a) Target memory...
  • Page 449 FUNCTIONS (4) Precautions The password registered to a file can not read out from the file. If the password can not be remembered, file operation other than following can not be performed. Take notes of the password registered and keep it on hand. (a) For Basic model QCPU •...

  • Page 450: Remote Password

    FUNCTIONS 6.19.2 Remote passwordNote62 Basic Note6.60 (1) Definition High Performance The remote password prevents illegal access to the CPU module by users in remote locations. Note6.60 After remote passwords have been set, a remote password check is performed when the CPU module is accessed from users in remote locations. (2) Flow from remote password setting to reflection Set the remote password using GX Developer and write it to the CPU module.
  • Page 451 FUNCTIONS (3) Modules that support remote password setting The following modules support remote password setting. • Serial communication module • Ethernet module • Modem interface module • Built-in Ethernet port QCPU POINT For details on the remote password of Built-in Ethernet port QCPU, refer to Section 7.7.
  • Page 452 FUNCTIONS (5) Number of remote password-set modules The number of remote password-set modules changes depending on the version of used GX Developer. Table6.38 indicates the number of remote password-set modules depending on the GX Developer version. Table6.38 Number of set modules according to GX Developer version Maximum Number GX Developer Version Module Name...
  • Page 453 FUNCTIONS (6) Remote password setting, changing and canceling procedures (a) Remote password setting • In the project data list of GX Developer, choose [Parameter] [Remote pass] to display the Remote password setting screen. Set the remote password. Remote password setup Detail is required with the QnUDE(H)CPU, QJ71E71...
  • Page 454 FUNCTIONS • Connect GX Developer to the CPU module. Write the set remote password to the CPU module. Redundant When a multiple CPU system is configured, write the remote password to the Note6.61 Note6.61 control CPU of the module to which the remote password is set. Note63 •...
  • Page 455 FUNCTIONS Remark Refer to the following manuals for further details on the remote password function. • When using Built-in Ethernet port QCPU Section 7.7 • When using Serial Communication Modules Q Corresponding Serial Communication Module Users' Manual (Application) • When using Ethernet Modules Q Corresponding Ethernet Interface Module Users' Manual (Basic) •...

  • Page 456: Cpu Module System Display By Gx Developer

    FUNCTIONS 6.20 CPU Module System Display by GX Developer After GX Developer is connected to the CPU module, the following items can be checked in the system monitor (refer to Figure 6.90 and Figure 6.91). • Installed status • Parameter status •...
  • Page 457 FUNCTIONS (1) Installed status Enables the controlling CPU, the model an07 d the number of modules mounted onto Note6.64 Basic the selected base unit to be confirmed. "Not installed" will be displayed for slots in which modules have not been mounted. Note6.64 When slots have been set as "Empty"...
  • Page 458 FUNCTIONS (5) Diagnostics This function is used to confirm the status of the CPU module and errors. (6) Module' s detailed information This function is used to confirm the detailed information for selected modules. Refer to the instruction manual for details on the relevant intelligent function module and intelligent function modules.
  • Page 459 FUNCTIONS (9) Detailed information of power supply module Indicates the ON/OFF status, error occurrence and number of momentary power failures of the power supply module. The detailed information of power supply module is available when redundant base unit or the power supply module that supports the detailed information of the power supply module is used.
  • Page 460 FUNCTIONS (10)Memory copy status Indicates the execution progress of the memory copy from control system to standby system. • During normal operation • When memory copy is executed from control system to standby system • When tracking cable is faulty Figure 6.94 Memory copy status (11)Other system status Indicates the status of the other system.

  • Page 461: Led Display

    USER SYSTEM B BAT. BAT. BOOT BOOT 1) : Basic model QCPU (Q00JCPU) 2) : Basic model QCPU (Q00CPU, Q01CPU) 3) : High Performance model QCPU, Process CPU, Universal model QCPU 4) : Redundant CPU Figure 6.96 LED on CPU module front Remark Refer to the following manual for details of the LED indications.

  • Page 462: Method To Turn Off The Led

    FUNCTIONS 6.21.1 Method to turn off the LED (1) Method to turn off the LED (a) For Basic model QCPU To turn off the ERR. LED that is on, remove the cause of the error and then operate the special relay SM50 and special register SD50 to cancel the error. (This does not apply to reset operation.) (b) For High Performance model QCPU, Process CPU, Redundant CPU, Universall model QCPU...

  • Page 463: Priority Setting

    FUNCTIONS 6.21.2 Priority settingNote70 Universal Note6.68 This section explains how to set the priority for error messages stored in SD220 to 227 (LED display data) at the time of error occurrence. (1) Displayed error messages and their priorities When multiple factors that can be displayed occur, the display is performed with the following conditions: •...
  • Page 464 FUNCTIONS (2) Priorities and factor Nos. The description and default priority for the factor Nos. to be set in the special registers SD207 to 209 are as follows: Table6.42 List of default factor Nos. and priorities Factor Priority Displayed error message Remarks number (Hexadecimal)
  • Page 465 FUNCTIONS POINT 1. When leaving the LED turned off at the error described above, set the factor No. setting area (each 4 bits), which stores the factor No. corresponding to SD207 to 209 to "0". [Example] To leave the ERR. LED off when a fuse shutoff error is detected, set the factor No.

  • Page 466: High Speed Interrupt Function

    FUNCTIONS 6.22 High Speed Interrupt FunctionNote71 Note72 Basic Note6.69 When an interrupt program is created using the interrupt pointer I49, the QnHCPU can run Process a program by making high speed, fixed-cycle interrupts at intervals of 0.2ms to 1.0ms. And, the QnHCPU improves the I/O response by refreshing the I/O signals and intelligent Note6.69 function module buffer memories in the parameter-set ranges before and after the Redundant...
  • Page 467 FUNCTIONS (1) Compatible CPUs Table6.43 CPU modules compatible with high speed interrupt function Compatible CPU Remarks modules Q02HCPU, Q06HCPU, There are restrictions on CPU module versions (Appendix 4.2(2)) Q12HCPU, Q25HCPU (2) Specifications of high speed interrupt function Table6.44 Specifications of high speed interrupt function Item Description Remarks...
  • Page 468 FUNCTIONS 6.22.1 High speed interrupt program executionNote73Note74 Basic Note6.71 The high speed interrupt program execution function is designed to run an interrupt Process program according to the setting of high speed interrupt pointer I49. Note6.71 (1) Setting method Redundant Set the high speed interrupt pointer I49 at "High speed interrupt I49 fixed scan interval"...
  • Page 469 FUNCTIONS (c) High speed interrupt program execution This function is executed when the following conditions are all satisfied. • When the EI instruction is being executed • When the CPU module is in the RUN status • When I49 is not masked by the IMASK instruction By default, I49 is not masked by the IMASK instruction.

  • Page 470: High Speed I/O Refresh, High Speed Buffer Transfer

    FUNCTIONS 6.22.2 High speed I/O refresh, high speed buffer transferNote75Note76 Basic Note6.73 High speed I/O refresh is a function that updates I/O signals between the I/O and Process intelligent function modules and CPU module at interrupt cycle intervals. High speed buffer transfer is a function that updates data between the intelligent function Note6.73 module buffer memories and CPU module devices at interrupt cycle intervals.
  • Page 471 FUNCTIONS (b) High speed buffer transfer setting Set the buffer memory transfer ranges. Figure 6.103 High speed buffer transfer setting screen Table6.46 High speed I/O refresh setting and high speed buffer transfer setting Number of Item Sub Item Contents Restrictions Settings Number of transferred bits Points [DEC.]...
  • Page 472 FUNCTIONS (2) Execution of this function This function is executed when the following conditions are all satisfied. • When the EI instruction is being executed • When the CPU module is in the RUN status • When I49 is not masked by the IMASK instruction By default, I49 is not masked by the IMASK instruction.

  • Page 473: Processing Times

    FUNCTIONS 6.22.3 Processing timesNote77Note78 Basic Note6.75 The following chart shows the processing times of the high speed interrupt function from a Process start to an end. Main routine program Note6.75 Redundant Waiting time Note6.75 High speed interrupt start Universal Input (X) Note6.75 High Buffer memory read...
  • Page 474 FUNCTIONS Table6.47 Processing times related to high speed I/O refresh and high speed buffer transfer Processing Item Processing Time • Max. 37.5 s or more than 37.5 s instruction processing time Waiting time • Max. 40 s when CC-Link IE controller network, MELSECNET/H, CC-Link or intelligent function modules are mounted on extension base unit.

  • Page 475: Restrictions

    FUNCTIONS 6.22.4 RestrictionsNote79Note80 Basic Note6.77 This section provides the cautions when executing the high speed interrupt function and Process the restrictions. Depending on the cautions, an WDT error may occur, or high speed interrupt may not be Note6.77 executed at preset cycle intervals. Redundant The items are classified into 4 types depending on the restriction level.
  • Page 476 FUNCTIONS Table6.48 Items that are completely disabled (Continued) Item Restriction When Used Interrupt program (I0 to I48, Interrupt program (I0 to I48, I50 to I255) and Since multiple interrupts are disabled, high speed interrupt is not I50 to I255), fixed scan fixed scan execution type program is not available at preset cycle while any interrupt or fixed scan execution type execution type program...
  • Page 477 FUNCTIONS (3) Items that have priorities over the high speed interrupt when interrupt is disabled Table6.50 Items that hold high speed interrupt by interrupt disable Item Precaution Instruction Interrupt is disabled during instruction execution. Interrupt is disabled during refresh (bus access). MELSECNET/H, CC-Link or intelligent function module refresh, waiting time CC-Link IE controller network, Link refresh...

  • Page 478: Interrupt From The Intelligent Function Module

    FUNCTIONS 6.23 Interrupt from the Intelligent Function ModuleNote81 Basic Note6.79 CPU module executes an interrupt program (I ) by the interrupt request from the intelligent function module. For example, the serial communication module processes the data reception by an interrupt program when the following data communication functions are executed. •Data reception during the communication with no handshaking protocol •Data reception during the communication with bi-directional protocol Processing data reception with an interrupt program improves the data reception speed of...

  • Page 479: Serial Communication Function

    2. The serial communication function is not used for connection of GX Developer or GX Configurator and CPU module. Note82 Basic The Q00JCPU does not support the serial communication function. Note6.80 Note83 High Redundant...
  • Page 480 FUNCTIONS (2) Specifications (a) Transmission specifications Table6.51 indicates the transmission specifications of RS-232 used for the serial communication function of the CPU module. Use the serial communication function after making sure that the specifications of the personal computer, Display device or the like match those of Table6.51. Table6.51 Transmission specifications of serial communication function Item Default...
  • Page 481 FUNCTIONS (b) RS-232 connector specifications Table6.53 indicates the applications of the RS-232 connector of the CPU module. Table6.53 RS-232 connector specifications Appearance Pin No. Signal Symbol Signal Name RD (RXD) Receive data SD (TXD) Send data Signal ground ------ ------ DSR (DR) Data set ready Mini-Din 6 pins...
  • Page 482 FUNCTIONS (3) Functions The serial communication function allows the MC protocol commands in Table6.54 to be executed. Refer to the following manual for details of the MC protocol. Q-Compatible MELSEC Communication Protocol Reference Manual Table6.54 List of MC protocol commands supported by serial communication function Function Command Processing...
  • Page 483 FUNCTIONS (4) Accessible devices Table6.55 Devices that can be accessed by serial communication function Device Number Range Class Device Device Code Write Read (Default Value) Function input 000000 to 00000F Hexadecimal Function output 000000 to 00000F Hexadecimal Internal Function register 000000 to 000004 Decimal system device...
  • Page 484 FUNCTIONS (5) Setting of transmission specifications Use the serial communication setting PLC parameters to set the transmission speed, sum check, transmission wait time and online change setting of the serial communication function. • When using the serial communication function to make communication with the personal computer, Display device or the like, specify "Use serial communication".
  • Page 485 FUNCTIONS (7) Error codes for communication made using serial communication function Table6.56 indicates the error codes, error definitions and corrective actions that are sent from the CPU module to the external device when errors occur during communication made using the serial communication function. Table6.56 List of error codes sent from CPU module to external device Error Code Error Item...
  • Page 486 FUNCTIONS Table6.56 List of error codes sent from CPU module to external device (Continued) Error Code Error Item Error Definition Corrective Action (Hexadecimal) • The command or device specified does not • Check and correct the sent message of the device 7F22 Command error exist.

  • Page 487: Service Processing

    FUNCTIONS 6.25 Service Processing 6.25.1 Module service interval time read Universal Note6.82 The module service interval indicates the time between a transient request such as monitor, test, program write/read. The CPU module can monitor the service interval time (time from service acceptance to next service acceptance) of the intelligent function module, network module or GX Developer.
  • Page 488 FUNCTIONS (2) (Program example) The following program example reads the module service interval of the intelligent function module at X/Y160 (Figure 6.109). Read start signal Sets I/O number 160 (hexadecimal) to SD550. Starts module service interval time read. Stores module service interval time into D551, D552. Figure 6.109 Module service interval reading program example POINT 1.

  • Page 489: Service Processing

    FUNCTIONS 6.25.2 Service processing Basic (1) Service processing setting overview Note6.83 High The service processing setting specifies the number or time of service processing Performance executed in END processing as desired. The service processing setting function can reduce increased scan time brought by Note6.83 the improvement of communication response with the peripheral devices and service Process...
  • Page 490 FUNCTIONS (2) Parameter setting The service processing can be set in the PLC system tab of the PLC parameter dialog box. Figure 6.110 Parameter setting screen The service processing can be executed by selecting one of the parameter items in Table6.59.
  • Page 491 FUNCTIONS (3) Operations for each service processing setting Operation details for each service processing setting is described below. (a) Operation details when "Execute the process as the scan time proceeds." is selected 1) Operation when "10%" is set Program execution GX Developer END processing Request 1...
  • Page 492 FUNCTIONS (b) Operation details when "Specify service process execution counts." is selected 1) Operation when "1 time" is set Program execution GX Developer END processing Request 1 Regardless of request data size, one Program execution request is processed at a single END processing. END processing Request 2 The scan time changes due to the difference of...
  • Page 493 FUNCTIONS (c) Operation details when "Specify service process time." is selected 1) Operation when "0.5ms" is set 0.5ms Program execution GX Developer END processing Request 1 When the time required for processing one request exceeds the specified service processing Program execution time (0.5ms), the service processing is suspended and the request is processed continuously at END processing of next scan.
  • Page 494 FUNCTIONS (d) Operation details when "Execute it while waiting for constant scan setting." is selected Constant scan Program execution END processing GX Developer Request 1 Waiting time Request 2 The service processing is executed in the waiting time. Program execution END processing Request 3 Waiting time...
  • Page 495 FUNCTIONS (4) Precautions The following describes the precautions when the service processing settings are configured. 1) On the following functions, scan time will increase longer than the specified time during service processing even if the service processing time specification is set. •...

  • Page 496: Device Initial Value

    FUNCTIONS 6.26 Device Initial ValueNote86 Basic (1) Definition The device initial value is a function that registers the data used in a program to the Note6.84 Note6.85 device or intelligent function module/special function module buffer memory Basic without any program.Note87 Note6.85 (2) Application of device initial value Process...
  • Page 497 FUNCTIONS (3) Timing when device initial values are written to specified devices The CPU module writes the data of the specified device initial value file to the specified device or intelligent function module buffer memory when the PLC is powered on or the CPU module is switched from the STOP status to the RUN status. Program memory Device initial Device...
  • Page 498 FUNCTIONS (5) Procedure and setting for use of device initial values In order to use the device initial values, the device initial data must be created with GX Developer in advance, and this data must be stored as a device initial value file in the Note6.86 CPU module program memory, standard RAM or memory card.
  • Page 499 FUNCTIONS • At the "PLC file" tab screen in the "(PLC) Parameter" dialog box, designate the name of the file where the device initial value data is to be stored. 1) For Basic model QCPU Set Device initial values to "Use" in the PLC file setting of the PLC parameter dialog box.
  • Page 500 FUNCTIONS (6) Precautions for the use of device initial values (a) When device initial value data and latch range data are overlapped In cases where both device initial value data and latch range data are overlapped, the device initial value data takes priority. Hence, the latch range data are also changed to the device initial value data when the power supply is switched OFF and then ON.

  • Page 501: Battery Life-Prolonging Function

    FUNCTIONS 6.27 Battery life-prolonging function Basic (1) Battery life-prolonging function The battery life-prolonging function prolongs the battery life by holding only clock data Note6.87 3in the battery of the CPU module. High Performance When the battery life-prolonging function is used, data other than clock data is all initialized when turning OFF power supply or canceling reset.
  • Page 502 FUNCTIONS (2) Battery life-prolonging function setting The battery life-prolonging function is set by the I/O assignment setting of the PLC parameter. 1) Perform I/O assignment setting. 2) Select the button. Switch setting 3) Input 0001 to the switch 3 of the CPU slot. (Even when inputting to other CPU slots, they are ignored.) Input 0001 Figure 6.122 Switch setting screen...

  • Page 503: Memory Check Function

    FUNCTIONS 6.28 Memory Check Function Basic The memory check function checks whether the memory contents are not modified due to excessive electric noise. Note6.88 Memories targeted for memory check depend on each CPU module. Table6.59 shows the High Performance target memories.Note90 Note6.88 Table6.61 Parameter item list...
  • Page 504 FUNCTIONS (b) Universal model QCPU The data in the executing program memory is checked automatically whether to match the based data (user program data) at the time they were written into the program memory of the CPU module. If the data in the executing program memory does not match the based data, a stop error, RAM ERROR (error code:1160), occurs.
  • Page 505 FUNCTIONS (3) Program memory check execution (a) Process CPU and Redundant CPU Memory check is executed both at "STOP to RUN switching" and "END processing" during RUN. • At STOP to RUN switching:Checks all area of the program memory. • At END processing :Checks by the capacity set at "Capacity to be checked at one time 256 step"...
  • Page 506 FUNCTIONS (5) Precautions Note the following items when executing memory check on the Process CPU and Redundant CPU. (a) Maximum delay time for detecting errors From the start of rewriting the program memory data to detecting the rewritten data, maximum delay time will occur as the following expression. The sequence program continues to execute before the program memory check detects errors.
  • Page 507 FUNCTIONS (b) Instructions not available at an execution of memory check If the following instructions are executed with setting memory check to be valid in the PLC parameter dialog box, OPERATION ERROR (error code:4105) Redundant Note6.89 occurs. Note91 • PLOADP instruction Note6.89 •...

  • Page 508: Latch Data Backup Function (To Standard Rom)

    FUNCTIONS 6.29 Latch Data Backup Function (to Standard ROM) Basic (1) Definition of latch data backup function (to standard ROM) Latch data backup function (to standard ROM) is a function to hold (backup) latch Note6.90 data such as device data or error history without using a battery when stopping the High Performance system for a long period.
  • Page 509 FUNCTIONS POINT When backing up the data of the file register, extended data register (D), and extended link register (W), pay attention to the following points. • The data is backed up only when the file register in the standard RAM is set to be used.
  • Page 510 FUNCTIONS (4) Execution method (a) Execution by contact 1) Setting method Set the start contact of the latch data backup to standard ROM by the PLC system setting of PLC parameter. (Device applicable for contact is X, M, or B.) Specify a contact Figure 6.126 Setting screen of start contact of latch data backup to standard ROM 2) Execution method...
  • Page 511 FUNCTIONS (5) Restoring backup data The data backuped is automatically stored by the following operations. • At power-on (OFF to ON) • At reset cancel Whether to restore data after executing backup only once or to restore data per the above-mentioned operations is set by SM676 (restore repetitive execution specification) at the time of backup operation.
  • Page 512 FUNCTIONS (7) Checking with special relay and special register The status of execution of latch data backup to the standard ROM or restore operation can be checked by SM671, SM676, SD671 to SD679. (8) Precautions The following shows precautions for backup of latch data. 1) Do not turn OFF power supply of the CPU module or perform reset operation during backup of latch data.

  • Page 513: Write/Read Device Data To/From Standard Rom

    FUNCTIONS 6.30 Write/Read Device Data to/from Standard ROM Basic (1) Definition of write/read device data to/from standard ROMNote93 Write/read the device data to/from the standard ROM is to write any device data to the Note6.91 standard ROM. Writing the fixed value used for operation and operation result to the High Performance standard ROM can prevent data disappearance at the time of low battery.
  • Page 514 FUNCTIONS (4) Setting method Set the area to store the device data to the standard ROM in the PLC file setting of the PLC parameter. Set the file size (file name is fixed to DEVSTORE) Figure 6.129 Setting screen of file for storing device data Remark For the details of the instruction, refer to the following manual.

  • Page 515: Chapter7 Communication Using Built-In Ethernet Ports Of Cpu Module

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE CHAPTER7 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE Basic The Built-in Ethernet port QCPU can communicate data by connecting built-in Ethernet ports of the CPU module with personal computers and/or display devices using an Note7.1 Ethernet cable (100BASE-TX, 10BASE-T).Note1...

  • Page 516: Communication Specifications

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.1 Communication specifications The following table shows the communication specifications for built-in Ethernet ports of the CPU module. Table7.2 Ethernet communication specifications Built-in Ethernet port QCPU Item Q03UDECPU Q04UDEHCPU Q06UDEHCPU Q13UDEHCPU Q26UDEHCPU Data transfer speed 100/10Mbps Communication mode...

  • Page 517: Gx Developer/Got Connection

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.2 GX Developer/GOT Connection The following describes the setting method for connecting the Built-in Ethernet port QCPU with GX Developer and/or GOT. Ethernet GX Developer GX Developer Figure 7.2 Connection example using hub POINT 1.
  • Page 518 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 1) Set the CPU module IP address. 2) Set the connection for GX Developer (MELSOFT connection). (Refer to Figure 7.4.) Figure 7.4 Built-in Ethernet port open settings screen • Protocol : Select the protocol to be used, "TCP" or "UDP" in accordance with the external device.
  • Page 519 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (2) Setting on GX Developer side Setting on GX Developer side is described below. (a) Set the items on the Transfer Setup screen in GX Developer as shown in Figure 7.5. Figure 7.5 Transfer Setup screen 1) Select "Ethernet board"...
  • Page 520 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 2) Select "PLC module" for "PLC side I/F". Enter the IP address or the host name of the CPU module on the detailed setting screen as shown in Figure 7.7. (For the host name, enter the name set in Microsoft or Windows hosts files.)
  • Page 521 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE POINT The Find CPU function can be used for specifying the CPU IP address in the connection using a hub. This function can be activated on the PLC side I/F Detailed setting of PLC module screen, finds the CPU modules connected to the same hub as GX Developer, and displays a list.
  • Page 522 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (3) Precautions • When the protocol is set to "TCP", existence check using the KeepAlive function is performed. The CPU module sends an existence check message five seconds after the last message from the external device is received and waits to see whether a response from the external device is received.
  • Page 523 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE • When the sampling trace function is executed using GX Developer which is connected with built-in Ethernet ports of the CPU module, stop the function before powering OFF the programmable controller or resetting the CPU module. •...

  • Page 524: Gx Developer Direct Connection (Simple Connection)

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.3 GX Developer Direct Connection (Simple Connection) When connecting the Built-in Ethernet port QCPU with GX Developer, the direct connection (simple connection), which connects them using only one Ethernet cable (not using a hub) is available. The direct connection enables communication with only specifying connection target (Broadcasting).
  • Page 525 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 1) Select "Ethernet board" for "PC side I/F". 2) Select "PLC module" for "PLC side I/F". Check the "Ethernet port direct connection" checkbox on the detailed setting screen as shown in Figure 7.15. Figure 7.15 PLC side I/F Detailed setting of PLC module screen 3) Make the setting for "Other station".

  • Page 526: Mc Protocol Communication

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.4 MC Protocol Communication Built-in Ethernet ports of the Built-in Ethernet port QCPU enable communication using the MC protocol External devices such as personal computers and display devices read/write device data from/to the CPU module using the MC protocol. External devices monitor the operation of the CPU module, analyze data, and manage production by reading/writing device data.
  • Page 527 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (1) Setting for MC protocol communication Setting for communication using the MC protocol is described below. Set the items on the Built-in Ethernet port tab of PLC parameter in GX Developer as shown below.
  • Page 528 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE POINT When the "Enable online change (FTP, MC protocol)" box is unchecked, if a data write request is sent from an external device to the CPU module which is in the RUN status, data will not be written to the CPU module and the module returns the NAK message.
  • Page 529 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (2) Command list When the Built-in Ethernet port QCPU communicates using the MC protocol, commands listed in Table7.3 can be executed. For details on the MC protocol, refer to the following manual. Q Corresponding MELSEC Communication Protocol Reference Manual Table7.3 List of MC protocol commands supported in MC protocol communication function of Built-in Ethernet port QCPU Status of CPU module...
  • Page 530 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (3) Available devices Table7.4 lists the devices available in commands used in the MC protocol communication function. Table7.4 List of available devices in Built-in Ethernet port QCPU Device number range Classification Device Device code Remarks (Default)
  • Page 531 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (4) Precautions (a) Number of connected modules In the connection with external devices using the MC protocol, the number of CPU modules set as "MELSOFT connection" in the open settings on Built-in Ethernet port tab of PLC parameter can be connected simultaneously.
  • Page 532 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (e) Response message receive processing Figure 7.20 shows an example of the response message receive processing on the external device side. Communication processing on the external device side Request message send processing Response message receive processing TCP connection is closed.
  • Page 533 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (5) Error codes for communication using MC protocol Table7.6 shows the error codes, error descriptions, and corrective actions that will be sent from the CPU module to an external device when an error occurs during communication using the MC protocol.

  • Page 534: Time Setting Function (Sntp Client)

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.5 Time Setting Function (SNTP Client) The Built-in Ethernet port QCPU collects time information from a time information server connected to LAN, making it possible to set the CPU time automatically. The Built-in Ethernet port QCPU time setting function queries a time information server to get the time at the specified timing and sets the time sent from the time information server as clock data for the CPU module.
  • Page 535 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE POINT 1. Check the connection of the hub or the external device first when executing a time setting operation at programmable controller power ON or CPU module reset. 2. The time setting result details can be checked with the special registers (SD1270 to SD1275).
  • Page 536 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (3) Precautions • To use the time setting function, an SNTP server personal computer (time information server) is required on LAN. • A delay occurs with respect to the time set in the CPU module as a result of the time required for communication with the server.

  • Page 537: File Transfer Function (Ftp)

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.6 File Transfer Function (FTP) The Built-in Ethernet port QCPU supports the FTP (File Transfer Protocol) server function. FTP is a protocol for transferring files between CPU modules and external devices. An external device with a FTP client function can simply access to files within the CPU module directly by using this FTP server function.
  • Page 538 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (1) Setting for FTP communication Setting for communication using the FTP is described below. (a) Operation on Built-in Ethernet port QCPU side Set the items on the Built-in Ethernet port tab of PLC parameter in GX Developer as shown below.
  • Page 539 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE Remark To access the CPU module via a router, set the "Subnet mask pattern" and the "Default router IP address" settings as well. ( Section 7.2) (b) Operation on external device (FTP client) side The procedure and required processing on the external device side when using the FTP server function of Built-in Ethernet port QCPU are described below.
  • Page 540 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 1) Logging in to Built-in Ethernet port QCPU Operations from starting the FTP to logging in to the Built-in Ethernet port QCPU are described below. Example) Start up the FTP from the MS-DOS prompt of a Microsoft Windows XP Operating System.
  • Page 541 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (2) List of transferable files Table7.7 lists the transferable files using the file transfer function. Table7.7 List of transferable files Memory card Target memory Built-in memory Memory card (ROM) (RAM) File name or File storage drive number extension Program...
  • Page 542 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (3) List of FTP client side user interface commands Table7.8 lists the FTP client commands can be used in the Built-in Ethernet port QCPU. Table7.8 List of FTP client side user interface commands CPU module status Remote password Command...
  • Page 543 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE Table7.9 Subcommands that can be used with "quote" command CPU module status Remote password Command Function Remarks STOP Unlocked Locked Write Write enabled disabled change Displays/changes the QnUDE(H)CPU file attribute. keyword-set Sets/displays/clears the QnUDE(H)CPU file access password. Specifies the remote password and changes the status from unlocked to password-lock locked.
  • Page 544 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (4) FTP command descriptions and file specification methods (a) FTP command descriptions The FTP operation commands (on the FTP client (external device) side) which can be used in the Built-in Ethernet port QCPU are described below. How to read descriptions Sections in brackets at [Specification format] can be omitted.
  • Page 545 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (5) FTP operation commands Functions and usages of FTP operation commands (on the FTP client side) which can be used in the Built-in Ethernet port QCPU are described below. POINT Note that some FTP operation commands (on the FTP client side) which can be used in the Built-in Ethernet port QCPU may not operate as described in this manual, depending on the FTP application used on the FTP client side.
  • Page 546 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE [Function] Reads a file from the Built-in Ethernet port QCPU. [Specification format] get Transfer source file path name [Transfer destination file path name] [Specification example1] When reading a file stored in the SRAM card and saving that file under the same file name get1:\MAINSEQ1.QDR [Specification example2]...
  • Page 547 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE mdir [Function] Saves detailed information (file names, created dates, and sizes) of files stored in the Built-in Ethernet port QCPU as log data in a file on the FTP client side. [Specification format] mdir Transfer source drive name:\ Transfer destination file path name [Specification example] When saving detailed information of files stored in the SRAM card to the...
  • Page 548 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE [Function] Saves the names of files stored in the Built-in Ethernet port QCPU as log data in a file on the FTP client side. [Specification format] mls Transfer source drive name:\ Transfer destination path name [Specification example] When saving the names of files stored in the SRAM card to the S990901F.LOG file...
  • Page 549 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE open [Function] Connects to the FTP server based on a specified host name or IP address and port number on the FTP server side. [Specification format] open Host name [Port number] open IP address [Port number] Host name: Host name set in Microsoft Windows hosts file...
  • Page 550 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE quote [Function] Sends an FTP server subcommand (Built-in Ethernet port QCPU dedicated subcommand). [Specification format] quote Built-in Ethernet port QCPU dedicated subcommand [Specification example] quote password-lock [Note] Only Built-in Ethernet port QCPU dedicated subcommands can be specified.
  • Page 551 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (b) Built-in Ethernet port QCPU dedicated subcommands The Built-in Ethernet port QCPU dedicated subcommands added to and sent with the FTP operation "quote" command are described below. change [Function] Displays/changes Built-in Ethernet port QCPU file attribute. [Specification format1] When displaying file attribute quote change File path name One of the following is displayed as the execution result upon normal...
  • Page 552 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE keyword-set [Function] Sets a file password registered in the file transfer target file into the Built-in Ethernet port QCPU. Or, displays/clears the password set for FTP settings in parameter. * 1 : This command is used only when a file password is registered in the file transfer target file. When accessing the specified file, the Built-in Ethernet port QCPU checks the file password.
  • Page 553 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE password-unlock [Function] Specifies the remote password set in the Built-in Ethernet port QCPU and performs unlock processing. * 2 : This command is used only when FTP communication port is specified for a remote password check target.
  • Page 554 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE [Function] Changes the Built-in Ethernet port QCPU status to RUN. (Executes remote RUN.) When changing the QnUDE(H)CPU status to RUN, device memory clear can be specified. [Specification format] quote run [Mode [Clear mode]] Mode: Specify whether to execute remote RUN forcibly.
  • Page 555 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE status [Function] Displays the operation information of the Built-in Ethernet port QCPU. This command checks the Built-in Ethernet port QCPU operation information when executing file transfer to the Built-in Ethernet port QCPU. [Specification format] quote status One of the following is displayed as the execution result upon normal completion.
  • Page 556 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (6) Precautions Precautions for using the file transfer function are described below. (a) FTP clients • FTP command specifications may differ from those described in this manual, depending on the FTP client. In such a case, check the functions and operation methods, referring to the manuals on the FTP client side.
  • Page 557 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (d) Precautions for writing files • Operation to overwrite an existing file cannot be performed. Either delete the file using a file delete command (delete, mdelete) or rename the file using a file name change command (rename) before writing the file.

  • Page 558: Remote Password

    COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE 7.7 Remote Password This function checks a remote password when the communication using the following connections is requested. • Communication using GX Developer • Communication using the MC protocol • File transfer POINT The remote password function is a function to prevent unauthorized access (ex.
  • Page 559 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (1) Communication method when a remote password is set The communication procedure with the Built-in Ethernet port QCPU with a preset remote password is described below. (a) Access enable processing (unlock processing) An external device such as a personal computer performs remote password unlock processing for the CPU module.
  • Page 560 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (2) Remote password setting Setting method for remote password is described below. (a) Setting remote password and writing parameters to CPU module Set the remote password and the connection target in GX Developer and write the parameter settings to the CPU module.
  • Page 561 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (b) Enabling parameter settings After writing parameter settings to the CPU module, settings are enabled by powering the programmable controller ON or resetting the CPU module. (c) Performing remote password unlock/lock processing Perform the remote password unlock/lock processing from an external device using respective protocol as follows.
  • Page 562 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (c) Remote password valid range The remote password is valid only for access from the Built-in Ethernet port QCPU for which the parameter settings were made. When multiple CPU modules are used in a multiple CPU system, set a remote password for each setting target CPU module respectively.
  • Page 563 COMMUNICATION USING BUILT-IN ETHERNET PORTS OF CPU MODULE (4) When remote password mismatch count reaches the upper limit during unlock processing When remote password mismatch count reaches the upper limit during unlock processing, an error (error code: 2700) occurs in the Built-in Ethernet port QCPU. The error cause is considered to be unauthorized access from outside of the system.

  • Page 564: Chapter8 Communication With Intelligent Function Module

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE CHAPTER8 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (1) Description of intelligent function modules The intelligent function module is a module that allows the CPU module to process analog values or high speed pulses which cannot be processed with I/O modules. For example, an analog value is converted into a digital value with the analog/digital conversion module, one of the intelligent function modules, before being used.

  • Page 565: Communication Between Cpu Module And Intelligent Function Modules

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.1 Communication Between CPU Module and Intelligent Function Modules The following methods enable the communication between the CPU module and intelligent function modules: • Initial setting or automatic refresh setting using GX Configurator Section 8.1.1) •...

  • Page 566: Initial Setting And Auto Refresh Setting By Gx Configurator

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.1.1 Initial setting and auto refresh setting by GX Configurator The initial setting and auto refresh setting of the intelligent function modules can be performed by adding in intelligent function module-compatible GX Configurator to GX Developer.
  • Page 567 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (b) Auto refresh setting For the auto refresh setting, designate the device at the CPU module to store the following data. • Digital output of Q64AD • Maximum/minimum values of Q64AD • Error code The auto refresh setting of Q64AD is designated on the following auto refresh setting screen of GX Configurator (Figure 8.2).
  • Page 568 Table8.2 Number of parameter settings that can be set by GX Configurator Number of parameter settings CPU module Initial setting Auto refresh setting Q00JCPU, Q00CPU, Q01CPU, Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU, Q02PHCPU, Q06PHCPU, Q12PHCPU, Q25PHCPU, Q12PRHCPU, Q25PRHCPU, MELSECNET/H remote I/O station...

  • Page 569: Initial Setting By Device Initial Value

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.1.2 Initial setting by device initial value (1) Device initial value Using the device initial values, the initial setting of the intelligent function module can be made without a program. ( Section 6.26) The set device initial values are written from the CPU module to the intelligent function module when the PLC is powered OFF and then ON or the CPU module is reset or switched from STOP to RUN.

  • Page 570: Communication By Intelligent Function Module Device

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.1.4 Communication by intelligent function module device (1) Intelligent function module device The intelligent function module device is the buffer memory of the intelligent function module represented as a device of the CPU module program. ( Section 10.5) The data stored in the intelligent function module buffer memory can be handled by the sequence instruction like the device memory.
  • Page 571 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE POINT The intelligent function module device accesses the intelligent function module every time the instruction is executed. When writing/reading buffer memory data using multiple intelligent function module devices in a sequence program, make sure to write/read the data in one position of the program using the FROM/TO instruction.

  • Page 572: Communication By Instructions For Intelli. Function Modules

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.1.5 Communication by instructions for Intelli. function modules (1) Description of the instructions dedicated for intelligent function modules The instructions dedicated for intelligent function modules are the instructions that facilitate programming using the functions of the intelligent function modules. (a) Example of serial communication module dedicated instruction (OUTPUT instruction) Use of the OUTPUT instruction allows communication with the external device by...
  • Page 573 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (3) Precautions (a) When RUN is switched to STOP before completion device turns ON If the instruction dedicated for intelligent function modules are executed and the CPU module is switched from RUN to STOP before the completion device turns ON, the completion device turns ON one scan later when the CPU module is switched to RUN next time.

  • Page 574: Access To Ans/A Series Corresponding Special Function Module

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 8.2 Access to AnS/A Series Corresponding Special Function Module Basic Note8.1 (1) Effects of quicker access to the special function moduleNote2 Process The Q series CPU module can process at higher speed, taking shorter time to scan. When the FROM/TO instruction is frequently executed for the special function module Note8.1 during a short scan, the processing of the target special function module may not be...

  • Page 575: Chapter9 Parameters

    PARAMETERS CHAPTER9 PARAMETERS This chapter explains the parameters that are set when a PLC system is configured. (1) Parameter types There are the following CPU module parameters. • PLC parameter ( Section 9.1) Set when the PLC is used independently. •...

  • Page 576: Plc Parameters

    PARAMETERS 9.1 PLC Parameters This section explains the PLC parameter list and parameter details. 9.1.1 Basic model QCPU (1) PLC name Set the label and comment of the used CPU module. Setting the label and comment in the PLC name does not affect the actual operation. Figure 9.1 PLC name Table9.1 PLC name list Item...
  • Page 577 No setting Section 10.11 pointer setting) No. of the intelligent function I50 to 127 module. [ Q00JCPU ] 0 points/16 points/32 points/64 points/128 points/256 points Set the number of empty slots on Points occupied by empty 1007 the main base unit/extension 16 points Section 4.6.1(5)
  • Page 578 PARAMETERS Table9.2 PLC system setting list (Continued) Item Parameter No. Description Setting range Default value Reference Interrupt C0 to 13184 (Can be set up to Set the start No. of the interrupt counter the number of counter setting No setting Section 10.2.11(4) counters.
  • Page 579 PARAMETERS (4) PLC RAS Make the various settings for the RAS function. Figure 9.4 PLC RAS Table9.4 PLC RAS list Item Parameter No. Description Setting range Default value Reference Set the watchdog timer WDT (watchdog 10ms to 2000ms WDT setting 3000 value of the CPU 200ms...
  • Page 580 PARAMETERS (5) Device Set the number of used points and latch range for each device. Figure 9.5 Device Table9.5 Device list Item Parameter No. Description Setting range Default value Reference : 2k points : 2k points X (2k points), Y (2k points), S (2k : 8k points points), SB (1k points) and SW : 2k points...
  • Page 581 PARAMETERS (6) Boot file Set whether a boot from the standard ROM will be executed or not. Figure 9.6 Boot file Table9.6 Boot file list Item Parameter No. Description Setting range Default value Reference Set whether a boot from the Do not execute boot/Execute Boot file ----...
  • Page 582 PARAMETERS (7) SFC Set the SFC program start mode, start condition and block stop-time output mode when an SFC program is used. Figure 9.7 SFC Table9.7 SFC list Item Parameter No. Description Setting range Default value Reference SFC program start mode 8002 Initial start Set the SFC program start...
  • Page 583 Set the model name of the Model mounted module. (User memo. 16 characters No setting name Not used for the CPU module.) [ Q00JCPU ] 0 points, 16 points, 32 points, 0400 Section 4.7 assignment 48 points, 64 points, 128 points, 256 points...
  • Page 584 PARAMETERS Table9.8 I/O assignment list (Continued) Item Parameter No. Description Setting range Default value Reference Set the model name of the used Base main base unit or extension base model 16 characters No setting unit. (User memo. Not used for name the CPU module.) Set the model name of the...
  • Page 585 PARAMETERS (9) Serial communication Set the transmission speed, sum check, message waiting time and online change enabled/disabled when the serial communication function of the Q00CPU or Q01CPU is used. Figure 9.9 Serial communication Table9.9 Serial communication list Item Parameter No. Description Setting range Default value...
  • Page 586 PARAMETERS (10) X/Y assignment Check the data set in the I/O assignment, Ethernet/CC IE/MELSECNET setting and CC-Link setting. Figure 9.10 X/Y assignment Table9.10 X/Y assignment list Item Parameter No. Description Setting range Default value Reference The data set in the I/O assignment, Ethernet/CC IE/ X/Y assignment ----...
  • Page 587 PARAMETERS (11)Multiple CPU setting Make the settings to configure a multiple CPU system. Figure 9.11 Multiple CPU setting Table9.11 Multiple CPU setting list Item Parameter No. Description Setting range Default value Reference Set the number of CPU modules Number of PLC 0E00 used by the multiple CPU 1 to 3 modules...

  • Page 588: High Performance Model Qcpu, Process Cpu, Redundant Cpu, Universal Model Qcpu

    PARAMETERS 9.1.2 High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU (1) PLC name Set the label and comment of the used CPU module. Setting the label and comment in the PLC name does not influence the actual operation.
  • Page 589 PARAMETERS (2) PLC system Make setting necessary to use the CPU module. The parameters may be the default values to perform control. Figure 9.13 PLC system Table9.13 PLC system list Item Parameter No. Description Setting range Default value Reference Low speed 1ms to 1000ms (1ms unit) 100ms Section 10.2.10...
  • Page 590 PARAMETERS Table9.13 PLC system list (Continued) Item Parameter No. Description Setting range Default value Reference Set the number of empty slots on 0 points/16 points/32 points/64 Points occupied by empty 1007 the main base unit/extension points/128 points/256 points/512 16 points Section 4.6.1(5) slot *4 base unit.
  • Page 591 PARAMETERS (3) PLC file Set various files used by the CPU module. Figure 9.14 PLC file Table9.14 PLC file list Item Parameter No. Description Setting range Default value Reference • Not used Set the file register file used by • Use the same file name as File register 1100 Not used...
  • Page 592 PARAMETERS (4) PLC RAS (PLC RAS (1) Set various items for the RAS function. Figure 9.15 PLC RAS Table9.15 PLC RAS list Item Parameter No. Description Setting range Default value Reference Set the watchdog timer value of 10ms to 2000ms (10ms unit) 200ms Section 3.2 setting...
  • Page 593 PARAMETERS Table9.15 PLC RAS list (Continued) Item Parameter No. Description Setting range Default value Reference Computation error Extended instruction error Fuse blown Module compari- son error Intelligent Operating module Set the operation mode of the mode when 3002 Stop/Continue Stop Section 6.17 program there is an...
  • Page 594 PARAMETERS Process (5) PLC RAS (2) Note9.1 Note9.1 Make the various settings for the RAS function in the Process CPU or Redundant CPU. his setting can be made only when the Redundant CPU or Process CPU is used. Figure 9.16 PLC RAS (2) Table9.16 PLC RAS (2) list Item Parameter No.
  • Page 595 PARAMETERS (6) Device Set the number of used points, latch range and local device range for each device. Figure 9.17 Device Table9.17 Device list Item Parameter No. Description Setting range Default value Reference X (8k points), Y (8k points), S (8k X:8k points,Y:8k points M:8k points, points)*...
  • Page 596 PARAMETERS Table9.18 Device list (Continued) Item Parameter No. Description Setting range Default value Reference • Number of points set for the Set the number of file register file register (ZR) (ZR), extended data register (D), • Assign a part of the points set Section 10.2 Dev.
  • Page 597 PARAMETERS (7) Program When writing multiple programs to the CPU module, set the file names and execution types (execution conditions) of the programs. Figure 9.18 Program Table9.19 Program list Item Parameter No. Description Setting range Default value Reference When writing multiple programs to the CPU module, set the file •...
  • Page 598 PARAMETERS (8) Boot file Note9.2 Make the settings to execute boot run and automatic write to standard ROM Universal Note9.2 Figure 9.19 Boot file Note1 Table9.20 Boot file setting list Item Parameter No. Description Setting range Default value Reference Clear Set whether the program Do not clear Do not clear/Clear program...
  • Page 599 PARAMETERS (9) SFC Set the SFC program start mode, start condition and block stop-time output mode when an SFC program is used. Figure 9.20 SFC Table9.21 SFC list Item Parameter No. Description Setting range Default value Reference SFC program start mode 8002 Initial start Set the SFC program start...
  • Page 600 PARAMETERS (10)I/O assignment Set the mounting status of each module in the system. Figure 9.21 I/O assignment Table9.22 I/O assignment list Item Parameter No. Description Setting range Default value Reference • CPU No. 2 to No. 4: No. n/ empty (Set "CPU (Empty)" on the slot not mounted with the Set the type of the mounted Type...
  • Page 601 PARAMETERS Table9.22 I/O assignment list (Continued) Item Parameter No. Description Setting range Default value Reference Set the model name of the used Base main base unit or extension base model 16 characters No setting unit. (User memo. Not used for name the CPU module.) Set the model name of the...
  • Page 602 PARAMETERS (11) X/Y assignment Check the data set in the I/O assignment, Ethernet/CC IE/MELSECNET setting and CC-Link setting. Figure 9.22 X/Y assignment Table9.23 X/Y assignment list Item Parameter No. Description Setting range Default value Reference The data set in the I/O assignment, Ethernet/CC IE/ X/Y assignment ----...
  • Page 603 PARAMETERS Redundant (12) Multiple CPU setting Note9.3 Note2 Note9.3 Make setting to configure a multiple CPU system. Figure 9.23 Multiple CPU setting Table9.24 Multiple CPU setting list Item Parameter No. Description Setting range Default value Reference Set the number of CPU modules No.
  • Page 604 PARAMETERS Table9.24 Multiple CPU setting list (Continued) Parameter Item Description Setting range Default value Reference • High Performance Set whether online module model QCPU: change (hot swapping) is Disable enabled or disabled in the Enable/Disable online module Online module change (hot •...
  • Page 605 PARAMETERS Basic (13) Built-in Ethernet port Note9.4 Note3 Note9.4 Make settings required for using built-in Ethernet ports of the Built-in Ethernet port High QCPU. Performance Note9.4 Process Note9.4 Redundant Note9.4 Universal Note9.4 Figure 9.24 Built-in Ethernet port Table9.25 Built-in Ethernet por setting list Item Parameter No.
  • Page 606 PARAMETERS Table9.25 Built-in Ethernet por setting list (Continued) Item Parameter No. Description Setting range Default value Reference Set items when the MC protocol Section 7.2 Open settings No settings communication function is used. Section 7.4 Set items when the File transfer FTP settings No settings Section 7.6...

  • Page 607: Redundant Parameter

    PARAMETERS 9.2 Redundant Parameter Basic Note9.5 This section explains the redundant parameter list and parameter details.Note4 High Performance Table9.26 Redundant parameters Parameter Note9.5 Item Description Setting range Default value Reference Process Set the operation mode Redundant 0D00 and tracking in the ---- ---- ----...
  • Page 608 PARAMETERS (2) Tracking settings Make the settings for the tracking function of the Redundant CPU. Figure 9.26 Tracking settings Table9.28 Tracking settings list Item Parameter No. Description Setting range Default value Reference Set whether the range of the Internal device block setting/ Internal device Tracking device settings tracking device data will be set...

  • Page 609: Network Parameters

    PARAMETERS 9.3 Network Parameters This section explains the network parameter list and parameter details. mn, **, N and M in the Parameter No. field of this section mn, **, N and M in the Parameter No. field of this section indicate the following. : Indicates a "start I/O No.
  • Page 610 PARAMETERS (1) CC-Link IE controller network setting Note9.7 The network parameter of the CC-Link IE controller network is set. Basic Note9.7 Figure 9.27 Number of modules on Ethernet/CC IE/MELSECNET. (When CC-Link IE controller network is set) Table9.31 CC-Link IE controller network setting list Item Parameter No.
  • Page 611 PARAMETERS (2) MELSECNET/H setting The network parameter of the MELSECNET/H is set. Figure 9.28 Number of modules on Ethernet/CC IE/MELSECNET. (for MELSECNET/H setting) Table9.32 MELSECNET/H setting list Item Parameter No. Description Setting range Default value Reference Number of modules on 5000 MELSECNET/H Starting I/O No.
  • Page 612 PARAMETERS (3) Ethernet setting The network parameter of the Ethernet network is set. Figure 9.29 Number of modules on Ethernet/CC IE/MELSECNET. (for Ethernet setting) Table9.33 Ethernet setting list Item Parameter No. Description Setting range Default value Reference Nunber of Ethernet 9000 Starting I/O No.
  • Page 613 PARAMETERS (4) CC-Link setting The network parameter of the CC-Link is set. Figure 9.30 Network parameters Setting the CC-Link list Table9.34 Network parameters Setting the CC-Link list Item Parameter No. Description Setting range Default value Reference Number of CC-Link C000 Starting I/O No.
  • Page 614 PARAMETERS Table9.34 Network parameters Setting the CC-Link list (Continued) Item Parameter No. Description Setting range Default value Reference Special relay (SB) CNM1 Set the CC-Link parameters. Refer to the CC-Link Manual. ---- ---- Special register (SW) Retry count Automatic reconnection station count Standby master station PLC down select...

  • Page 615: Remote Password

    PARAMETERS 9.4 Remote Password This section explains the remote password-related parameter list and parameter details. Figure 9.31 Remote password setting screens Set the remote password of the Ethernet module, serial communication module, modem interface module and Built-in Ethernet port QCPU. Table9.35 Remote password setting list Item Parameter No.
  • Page 616 DEVICE EXPLANATION CHAPTER10 DEVICE EXPLANATION This chapter describes all devices that can be used in the CPU module. 10.1 Device List The names and data ranges of devices which can be used in the CPU module are shown in Table10.1 and Table10.2. (1) Basic model QCPU Table10.1 Device List Default Values...
  • Page 617 Table10.1 Device List (Continued) Default Values Parameter Reference Class Type Device Name Number of Designated Range Used Section Points Setting Range Q00JCPU File Word File Unchangeable Section 10.7 Q00CPU, R0 to 32767 register device register Decimal Q01CPU ZR0 to 65535...
  • Page 618 DEVICE EXPLANATION (2) High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU Table10.2 Device List Default Values Parameter Designated Reference Class Type Device Name Number of Range Used Setting Section Points Range 8192 X0 to 1FFF Hexadecimal Section 10.2.1 Input 8192 Y0 to 1FFF...
  • Page 619 DEVICE EXPLANATION Table10.2 Device List (Continued) Default Values Parameter Designated Reference Class Type Device Name Number of Range Used Setting Section Points Range Index register/ Index register/ Z0 to 15 Word Standard Standard device Decimal Unchangeable Section 10.6 device (20) (Z0 to 19) device resister...
  • Page 620 DEVICE EXPLANATION * 1 : For the timer, retentive timer, and counter, bit devices are used for the "contact" and the "coil", and the word device is used for the "present value". * 2 : The actual number of usable points varies according to the intelligent/special function module Note10.1 Process Redundant...

  • Page 621: Internal User Devices

    DEVICE EXPLANATION 10.2 Internal User Devices (1) Definition Internal user devices can be used for various user applications. The "number of usable points" setting is designated in advance (default value) for internal user devices. However, this setting can be changed at the "Device" tab screen in the "(PLC) Parameter"...
  • Page 622 DEVICE EXPLANATION (a) Setting range The number of device points can be specified in units of 16-point. Up to 32k/60k points can be set for one device. One point is calculated as two points for timers, retentive timers, and counters (one for coil, one for contact).
  • Page 623 DEVICE EXPLANATION (3) Memory capacity Use the following expression to obtain the memory capacity of an internal user device. (For the Basic model QCPU) (Bit device capacity) + (Word device capacity) + (Timer, retentive timer and counter capacity) 16.4k words (For the High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU) (Bit devices capacity) + (Word devices capacity) + (Timer, retentive timer and...
  • Page 624 DEVICE EXPLANATION (4) Device point assignment example A device point assignment example for the High Performance model QCPU is shown in Table10.5. Table10.5 is based on the device point assignment sheet shown in Appendix 9. Table10.5 Device point assignment example (for High Performance model QCPU) *1*2 Restriction check Device...

  • Page 625: Input (X)

    DEVICE EXPLANATION 10.2.1 Input (X) (1) Definition Inputs transmit commands or data to the High Performance model QCPU from an external device such as push-button switches, selector switches, limit switches, digital switches. Push-button switch Selector switch Input (X) Sequence operation Digital switch Figure 10.2 Commands from external devices to CPU module (2) Concept of input (X)
  • Page 626 DEVICE EXPLANATION POINT 1. When debugging a program, an input (X) can be set to ON/OFF as described below. • GX Developer test operation • OUT Xn instruction OUTX1 ON/OFF command Figure 10.5 Input(X) ON/OFF by the OUT Xn instruction 2.

  • Page 627: Output (Y)

    DEVICE EXPLANATION 10.2.2 Output (Y) (1) Definition Outputs give out the program control results to the external devices such as solenoid, electromagnetic switch, signal lamp and digital display. Outputs give out the result equivalent to one N/O contact. Signal lamp Digital display Output (Y) Sequence...

  • Page 628: Internal Relay (M)

    DEVICE EXPLANATION 10.2.3 Internal relay (M) (1) Definition Internal relays are auxiliary relays used in the CPU module. All internal relays are switched OFF at the following times: • When the PLC is powered OFF and then ON. • When the CPU module is reset. •...
  • Page 629 DEVICE EXPLANATION (4) Procedure for external outputs Outputs (Y) are used to output sequence program operation results to an external destination. POINT Latch relays (L) should be used when a latch (memory backup) is required.( Section 10.2.4) 10.2 Internal User Devices - 14 10.2.3 Internal relay (M)

  • Page 630: Latch Relay (L)

    DEVICE EXPLANATION 10.2.4 Latch relay (L) (1) Definition Latch relays are auxiliary relays which can be latched by the programmable controller's internal latch (memory backup). Latch relay operation results (ON/OFF information) are saved even in the following cases: • When the PLC is powered OFF and then ON •...
  • Page 631 DEVICE EXPLANATION (4) Procedure for external outputs Outputs (Y) are used to output sequence program operation results to an external destination. POINT 1. Internal relays (M) should be used when a latch (memory backup) is not required.( Section 10.2.3) 2. For latch clear, the latch clear disabled range can be set to each device in the device setting of the PLC parameter dialog box.( Section 6.3) 10.2 Internal User Devices...

  • Page 632: Annunciator (F)

    DEVICE EXPLANATION 10.2.5 Annunciator (F) (1) Definition Annunciators are internal relays used for fault detection programs created by the user. (2) Special relay and special registers at annunciator ON When annunciators switch ON, a special relay (SM62) switches ON, and the Nos. and quantity of the annunciators which switched ON are stored at the special registers (SD62 to 79).
  • Page 633 DEVICE EXPLANATION (5) Annunciator ON procedure (a) Annunciator ON procedure The annunciator can be turned ON by either of the following instructions. 1) SET F instruction The SET F instruction turns ON the annunciator only on the leading edge (OFF to ON) of the input condition. If the input condition turns OFF, the annunciator is held ON.
  • Page 634 DEVICE EXPLANATION (b) Processing at annunciator ON 1) Data stored at special registers (SD62 to 79) • Nos. of annunciators which switched ON are stored in order at SD64 to • The annunciator No. which was stored at SD64 is stored at SD62. •...
  • Page 635 DEVICE EXPLANATION (6) Annunciator OFF procedure and processing content (a) Annunciator OFF procedure The annunciator can be turned OFF by any of the following instructions. 1) RST F instruction An annunciator No. which has been switched ON by the SET F instruction can be switched OFF by the RST F instruction.
  • Page 636 DEVICE EXPLANATION (b) Processing at annunciator OFF 1) Special register (SD62 to 79) data operation at execution of LEDR Note10.7 instruction Note7 • The annunciator No. stored in SD64 is deleted, and the annunciator Nos. Basic stored in SD65 and later are shifted up. •...
  • Page 637 DEVICE EXPLANATION 2) Special register (SD62 to 79) data operation when annunciator is tunred OFF by executing the RST F instruction or BKRST instruction • The annunciator No. specified by the RST instruction/BKRST instruction is deleted, and the stored annunciator Nos. after the deleted annunciator No. are shifted up.

  • Page 638: Edge Relay (V)

    DEVICE EXPLANATION 10.2.6 Edge relay (V) (1) Definition An edge relay is a device which stores the operation results (ON/OFF information) from the beginning of the ladder block. Edge relays can only be used at contacts, and cannot be used as coils. Edge relay Stores the X0, X1 and X10 operation results...

  • Page 639: Link Relay (B)

    DEVICE EXPLANATION 10.2.7 Link relay (B) (1) Definition Link relays are CPU module side relays used when refreshing the link relay (LB) data of the MELECNET/H network module, etc. to the CPU module or when refreshing the CPU module data to the link relays (LB) of the MELECNET/H network module, etc. CPU module MELSECNET/H network module Link relay...
  • Page 640 DEVICE EXPLANATION (3) Using link relays in the network system In order to use link relays in the network system, a network parameter setting is required. The link relay range where network parameter setting has not been made (not used by the MELSECNET/H network system, etc.) is available as the internal relays or latch relays.

  • Page 641: Link Special Relay (Sb)

    DEVICE EXPLANATION 10.2.8 Link special relay (SB) (1) Definition A link special relay indicates the communication status and error detection of an intelligent function module, such as CC-Link IE controller network module and MELSECNET/H network module. ON/OFF of the link special relays are controlled by various causes that occur during data link.
  • Page 642 DEVICE EXPLANATION Table10.6 Number of link special relay points of each CPU module (continued) CPU module Number of link special relay points 2048 points (SB0 to 7FF) However, this setting can be changed in the device setting of the PLC parameter dialog box. (Section 10.1(2)) For the intelligent function module, such as the CC-Link IE controller network module and MELSECNET/H network module, having link special relays, 512 points are assigned.

  • Page 643: Step Relay (S)

    DEVICE EXPLANATION 10.2.9 Step relay (S) Step relays are devices for SFC programs. Refer to the following manual for how to use the step relays. QCPU (Q Mode)/QnACPU Programming Manual (SFC) POINT Because the step relay is a device exclusively for the SFC program, it cannot be used as an internal relay in the sequence program.

  • Page 644: Timer (T)

    DEVICE EXPLANATION 10.2.10 Timer (T) (1) Definition A timer (T) is a device that starts counting when its coil turns ON, and times-out and turns ON its contact when the current value reaches or exceeds the set value. The timer is of an up-counting type. The current value matches the set value when a "time-out"...
  • Page 645 DEVICE EXPLANATION (b) Measurement units The default time measurement units setting for low speed timers is 100 ms. The time measurement units setting can be designated in 1 ms units within a 1 ms to 1000 ms range. This setting is designated at the "PLC system" tab screen in the "(PLC) Parameter"...
  • Page 646 DEVICE EXPLANATION (6) Retentive timers (a) Definition Retentive timers measure the "coil ON" time. The measurement begins when the timer coil switches ON, and the contact switches ON when a time-out (coil OFF) occurs. Even when the timer coil is OFF, the current value and the contact ON/OFF status are saved.
  • Page 647 DEVICE EXPLANATION (7) Timer Processing and accuracy (a) Processing method When an OUT T instruction is executed, the following is processed: timer coil ON/OFF, current value update and contact ON/OFF processing. Timer current value update and contact ON/OFF processing are not performed at END processing.
  • Page 648 DEVICE EXPLANATION (b) Accuracy Measured value at END instruction is added to the current value when the OUT T instruction is executed.. [Ladder example] [Current value update timing] OUT T0 OUT T0 OUT T0 OUT T0 OUT T0 OUT T0 processing processing processing...
  • Page 649 DEVICE EXPLANATION (8) Precautions for using timers The following are a few precautions regarding timer use: (a) Use of the same timer A given timer cannot be designated (by OUT T ) more than once in a single scan. This designation results in measurement, since the timer current value is updated at execution of each OUT T instruction.
  • Page 650 DEVICE EXPLANATION (g) When using the multiple timers When using the multiple timers to update the current value of a timer at the time of executing each OUT T instruction, pay attention to the order of ladders. For example, when creating ON/OFF ladder using two timers, create a ladder as shown in Figure 10.27.

  • Page 651: Counter (C)

    DEVICE EXPLANATION 10.2.11 Counter (C) (1) Definition A counter is a device which counts the number of input condition leading edges in sequence programs. When the count value matches the set value, the counter counts up and its contact turns ON. The counter is of an up-counting type.
  • Page 652 DEVICE EXPLANATION (b) Current value update (count value + 1) The current value update (count value + 1) is performed at the leading edge (OFF to ON) of the OUT C instruction. The current value is not updated in the following OUT C instruction statuses: OFF, ON to ON, ON to OFF [Ladder example]...
  • Page 653 DEVICE EXPLANATION (c) Resetting the counter Counter current values are not cleared even if the OUT C instruction switches OFF. Use the RST C instruction to clear the counter's current value and switch the contact OFF. The count value is cleared and the contact is switched OFF at execution of when the RST C instruction.
  • Page 654 DEVICE EXPLANATION OUT C0 RST C0 OUT C0 RST C0 Sequence program Coil of C0 Current value is updated Current value update since coil of C0 turns & contact ON Coil of C0 OFF from OFF to ON. RST C0 Count value cleared &...
  • Page 655 DEVICE EXPLANATION (4) Interrupt counters Note10.11 Note11 Universal (a) Definition Note10.11 Interrupt counters are devices which count the number of interrupt factor occurrences. (b) Count processing 1) When interrupt occurs The interrupt counter's current value is updated when an interruption occurs. It is not necessary to create a program which includes an interrupt counter function.
  • Page 656 DEVICE EXPLANATION (c) Setting the interrupt counter In order to use interrupt counters, set Interrupt counter start No. at the "PLC system" tab screen in the "(PLC) Parameter" dialog box. The number of points indicated in Table10.8 starting from the set counter number is used as interrupt counters.
  • Page 657 DEVICE EXPLANATION (5) Precautions (a) Execution of interrupt counter and interrupt program One interrupt pointer is insufficient to execute interrupt counter and interrupt program operation. Moreover, an interrupt program cannot be executed by an interrupt counter setting designated at the "PLC system" tab screen in the "(PLC) Parameter" dialog box. (b) Processing that delays count processing If the processing items shown below are in progress when an interruption occurs, the counting operation will be delayed until processing of these items is...

  • Page 658: Data Register (D)

    DEVICE EXPLANATION 10.2.12 Data register (D) (1) Definition Data registers are memory devices which store numeric data (-32768 to 32767, or 0000 to FFFF (2) Bit configuration of data register (a) Bit configuration and read and write units Data registers, which consist of 16 bits per point, read and write data in 16-bit units.

  • Page 659: Link Register (W)

    DEVICE EXPLANATION 10.2.13 Link register (W) (1) Definition A link register is the CPU module memory used to refresh the CPU module with data from the link registers (LW) of intelligent function modules including MELSECNET/H network module. CPU module MELSECNET/H network module Link register Link register Link refresh...
  • Page 660 DEVICE EXPLANATION (b) When link register is used for 32-bit instruction If the link registers are used for 32-bit instructions, the data is stored in registers Wn and Wn + 1. The lower 16 bits of data are stored in the link register No. (Wn) designated in the sequence program, and the higher 16 bits of data are stored in the designated register No.
  • Page 661 DEVICE EXPLANATION (4) Using link registers in a network system In order to use link registers in the network system, network parameter settings must be made. Link registers not set in the network parameter settings can be used as data registers. Remark Refer to the following manual for the network parameters.

  • Page 662: Link Special Register (Sw)

    DEVICE EXPLANATION 10.2.14 Link special register (SW) (1) Definition Link special registers are used to store data on the communication status and errors of an intelligent function module such as CC-Link IE controller network module and MELSECNET/H network module. Because the data link information is stored as numeric data, the link special registers serve as a tool for identifying the locations and causes of faults.
  • Page 663 DEVICE EXPLANATION Table10.9 Number of link special register points of each CPU module (continued) CPU module Number of link special relay points 2048 points (SB0 to 7FF) However, this can be changed in the device setting of the PLC parameter dialog box. Section 10.1(2)) For the intelligent function module, such as the CC-Link IE controller network module and MELSECNET/H network module,...

  • Page 664: Internal System Devices

    DEVICE EXPLANATION 10.3 Internal System Devices Internal system devices are used for system operations. The allocations and sizes of internal system devices are fixed, and cannot be changed by the user. 10.3.1 Function devices (FX, FY, FD) (1) Definition Function devices are used in subroutine programs with arguments. The function devices write/read data between a subroutine call source with argument and a subroutine program with argument.
  • Page 665 DEVICE EXPLANATION (c) Function registers (FD) • Function registers are used to perform write/read of data between the sub- routine call source and the subroutine program. • The function register I/O condition is automatically determined by the High Performance model QCPU. If the subroutine program data is the source data, the data is designated as subroutine input data.
  • Page 666 DEVICE EXPLANATION POINT Valid devices cannot be used in a subroutine program that contains arguments. If devices assigned for function registers are used, values of the function registers will not correctly be returned to a calling program. CALLP P0 D0 D R0 R10 FD0 MOV K0 D3 Since the points (D0 to 3) are used...

  • Page 667: Special Relay (Sm)

    DEVICE EXPLANATION 10.3.2 Special relay (SM) (1) Definition A special relay is used to store CPU module status data. (2) Special relay classifications Special relays are classified according to their applications, as shown in Table10.10. Table10.10 Special relay classification list CPU module High Classification...

  • Page 668: Special Register (Sd)

    DEVICE EXPLANATION 10.3.3 Special register (SD) (1) Definition A special register is used to store CPU module status data (diagnosis and system information). (2) Special register classifications Special registers are classified according to their applications, as shown in Table10.11. Table10.11 Special register classification list CPU module High Classification...

  • Page 669: Link Direct Device

    DEVICE EXPLANATION 10.4 Link direct device (1) Definition The link direct device is a device to directly access the link device in the CC-Link IE controller network module or MELSECNET/H network module. The CPU module can directly write/read data to/from the link device in the CC-Link IE controller network module or MELSECNET/H network module using the sequence program regardless of the link refresh.
  • Page 670 DEVICE EXPLANATION (3) Designation range The link direct device can specify the link device of the network module. The link device range that is not set by the network refresh parameter can be specified. (a) Writing • Writing is executed within that part of the link device range set as the send range in the common parameters of the network parameters that is outside the range specified as the "refresh range"...
  • Page 671 DEVICE EXPLANATION [Refresh parameter settings] • Network No. : 1 • CPU module (W0 to 3F) Network module (LW0 to 3F) [Sequence program] "100" is written to network module MOV K100 W1 LW1 when a refresh occurs. "100" is written to network J1\W1 module LW1 when the MOV instruction is executed.
  • Page 672 DEVICE EXPLANATION (b) Reading Reading by link direct device is allowed in the entire link device range of network modules. POINT The CPU module can write/read data to/from only one network module on the same network using a link direct device. If two or more network modules are mounted on the same network, the network Basic module whose slot number is younger is targeted for writing/reading data to/from...
  • Page 673 DEVICE EXPLANATION (4) Differences between "link direct devices" and "link refresh" The differences between "link direct devices" and "link refresh" are shown in Table10.12. Table10.12 Differences Between "Link Direct Devices" and "Link Refresh" Item Link Direct Device Link Refresh Link relay B0 or later J \K4B0 or later Program...

  • Page 674: Module Access Devices

    Starting I/O number of intelligent function module/special function module Setting : First 2 digits of starting I/O number expressed in 3 digits X/Y1F0 For X/Y1F0 Designation: 1F Setting range : Q00JCPU : 00 to 0F Q00/Q01CPU : 00 to 3F Other CPU module : 00 to FF Figure 10.52 Intelligent function module device designation method...
  • Page 675 DEVICE EXPLANATION (3) Processing speed The processing speed for intelligent function module devices is; • The processing speed of write/read by the intelligent function module is slightly higher than that of write/read by the FROM/TO instruction.(For example, "MOV U2\G11 D0") •...

  • Page 676: Common Device For Multiple Cpu (U3En\G)

    DEVICE EXPLANATION 10.5.2 Common device for multiple CPU (U3En\G ) Redundant Note10.15 (1) Definition of common device for multiple CPU The common device for multiple CPU allows the CPU module to access the CPU shared memory in each CPU module of a multiple CPU system. The common device for multiple CPU allows the CPU module to access the CPU shared memory in each CPU module of a multiple CPU system.

  • Page 677: Index Register(Z) / Standard Device Resister(Z)

    DEVICE EXPLANATION 10.6 Index Register(Z) / Standard Device Resister(Z) 10.6.1 Index Register (Z) (1) Definition Index registers are used in the sequence program for indirect setting (index Universal qualification) designations. Note10.16 An index register point is used for index modification. Note10.16 MOVP SM400...

  • Page 678: Standard Device Register (Z)

    DEVICE EXPLANATION (b) When index register is used for 32-bit instruction If the index registers are used for 32-bit instructions, the data is stored in registers Zn and Zn +1. The lower 16 bits of data are stored in the index register No. (Zn) designated in the sequence program, and the upper 16 bits of data are stored in the designated index register No.

  • Page 679: Switching Between Scan Execution And Low Speed Execution Types

    DEVICE EXPLANATION 10.6.3 Switching between scan execution and low speed execution types Basic Note10.17 The CPU module saves (protects) and restores the index register (Z0 to 15) contents Redundant when switching between a scan execution type program and a low speed execution type program.

  • Page 680: Switching Scan/Low Speed Exec. To Interrupt/Fixed Scan Exec

    DEVICE EXPLANATION 10.6.4 Switching scan/low speed exec. to Interrupt/fixed scan exec.Note19 Basic Note10.18 The CPU module performs the following processing when switching between a scan/ low speed execution type program and an interrupt/fixed scan execution type Redundant Universal program. • Index register value is saved (protected)/restored. Note10.19 Note10.19 •...
  • Page 681 DEVICE EXPLANATION (2) Index register processing (a) When "High-speed execution" is not selected 1) When switching from scan/low speed execution type program to interrupt/fixed scan execution type program The CPU module saves the index register value of the scan/low speed execution type program and passes it to the interrupt/fixed scan execution type program.
  • Page 682 DEVICE EXPLANATION (b) When "High-speed execution" is selected 1) When switching from scan/low speed execution type program to interrupt/fixed scan execution type program The CPU module does not save/restore the index register value. 2) When switching from interrupt/fixed scan execution type program to scan/low speed execution type program If data is written to index registers by using an interrupt program/fixed scan execution type program, the values of index registers used for an scan/low...
  • Page 683 DEVICE EXPLANATION (3) Processing of file register block No. (a) When switching from scan/low speed execution type program to interrupt/ fixed scan execution type program The CPU module saves the file register block No. of the scan/low speed execution type program and passes it to the interrupt/fixed scan execution type program. (b) When switching from interrupt/fixed scan execution type program to scan/ low speed execution type program The CPU module restores the saved file register block No.

  • Page 684: File Register (R)

    DEVICE EXPLANATION 10.7 File Register (R) (1) Definition File registers are expansion devices for data registers. The file registers can be used at the same processing speed as the data registers. K100 R2 File register "100" is written to R2. Figure 10.66 Write to file register (2) Bit configuration of file register (a) Bit configuration and write/read units...

  • Page 685: File Register Data Storage Location

    The file register data storage location changes depending on the CPU module. The file register data storage location of each CPU module is as described in Table10.13. Table10.13 File register data storage locations CPU module Storage location Q00JCPU None (File registers unavailable) Basic model QCPU Q00CPU, Q01CPU Standard RAM...

  • Page 686: File Register Capacity

    ( Section 5.1.1, Section 5.2.1) Table10.14 File register capacity of each CPU module CPU module Number of points Q00JCPU File registers unavailable Basic model QCPU Q00CPU, Q01CPU 64k points Q02CPU 32k points...
  • Page 687 DEVICE EXPLANATION Basic (3) Using the Flash Card Note10.21 Note22 The number of points or blocks that can be expanded depends on the CPU module. Note10.21 • For High Performance model QCPU, Process CPU, and Redundant CPU Up to 1018k points can be stored in one file. Up to 32 blocks can be stored (32k words/block).

  • Page 688: Differences In Access Methods By Storage Destination Memory

    DEVICE EXPLANATION 10.7.3 Differences in access methods by storage destination memory The file register access method changes depending on the memory.Note23 Basic Table10.15 File register access method for each memory Note10.21 SRAM Card Flash Card How to Access Standard RAM Note10.21 Note10.21 Writing a program...

  • Page 689: File Register Registration Procedure

    DEVICE EXPLANATION 10.7.4 File register registration procedureNote24 Basic Note10.22 To use file registers, register the file registers with the CPU module in the following steps. Start Setting of file register to be used "PLC file" tab screen at(PLC) "parameter" dialog box "Use the following files"...
  • Page 690 DEVICE EXPLANATION (1) Designating file registers for use The standard RAM or the memory card file registers which are to be used in the sequence program are determined at the "PLC file" tab screen in the "(PLC) Parameter" dialog box. Figure 10.71 File register setting (a) Not used This setting should be selected for the following cases:...
  • Page 691 DEVICE EXPLANATION (b) Use the same file name as the program This setting should be selected when the file registers having the same file name as the sequence program are to be used. 1) Operation performed when program is changed If the program is changed, the file registers are automatically changed to conform to the new program name.
  • Page 692 DEVICE EXPLANATION (c) Use the following file This setting should be selected when a given file register is to be shared by all executed programs. Specify the desired parameters in the "Corresponding memory", "File name", and "Capacity" text boxes. The High Performance model QCPU creates a file register file with the specified parameters.
  • Page 693 DEVICE EXPLANATION (3) Registering the File Register File with the CPU module If you click on the following check boxes at the "PLC file" tab screen in the "(PLC) Parameter" dialog box, you must register a file register file with the CPU module: •...

  • Page 694: File Register Designation Method

    DEVICE EXPLANATION 10.7.5 File register designation method (1) Block switching format The block switching format designates the number of file register points in 32k point (R0 to 32767) units. If multiple blocks are used, switch to the block No. to be used in the RSET instruction for further file register settings.

  • Page 695: Precautions For Using File Registers

    DEVICE EXPLANATION 10.7.6 Precautions for using file registers (1) When Basic model QCPU is used An error will not occur if data are written/read to/from the file register numbers of 64k points or more. However, note that undefined data will be stored if data are read from the file registers.
  • Page 696 DEVICE EXPLANATION (b) File register capacity check When writing/reading data to/from the file register, check the file register capacity so that data is written/read within the capacity (points) set to the CPU module. 1) File register capacity checking method The available file register capacity can be checked in the file register capacity storage register (SD647).
  • Page 697 DEVICE EXPLANATION 3) Checking the file register capacity • Check The file register capacity used for each sequence program. • Determine if the file register capacity exceeds the number of points used, on the basis of the total file register capacity set in SD647 in the sequence program.
  • Page 698 DEVICE EXPLANATION (d) Change of file register processing time depending on CPU module Basic Process Redundant Note10.23 version Note25 When the file register is specified in the serial access format (ZR ) for the Note10.23 Note10.23 Note10.23 access instruction to the standard RAM on the High Performance model QCPU of Universal which first 5 digits of serial No.

  • Page 699: Extended Data Register (D) And Extended Link Register (W)

    DEVICE EXPLANATION 10.8 Extended Data Register (D) and Extended Link Register (W) Basic (1) Definition The extended data register (D) and extended link register (W) are devices to be used Note10.24 as an extended area of the data register (D) and link register (W) in the large-capacity High Performance file register (ZR) area.
  • Page 700 DEVICE EXPLANATION (2) Device number Device numbers for the extended data register (D) and extended link register (W) can be sequentially assigned to those for the internal user devices, data register (D) and link register (W). POINT 1. Even though device numbers are sequentially assigned, physical areas of the data register (D) and the extended data register (D) inside the CPU module are not connected.
  • Page 701 DEVICE EXPLANATION (3) Setting method Since the extended data register (D) and extended link register (W) use the file register area, settings for both file register and device are required. (a) File register setting Select the "Use the following file." item at File register on the PLC file tab of PLC parameter in GX Developer and set the items in Table 10.17.
  • Page 702 DEVICE EXPLANATION (b) Device setting Set the number of points for each file register (ZR), extended data register (D), and extended link register (W) at File register extended setting on the Device tab of PLC parameter in GX Developer. Assign a part of points set for the file register (ZR) on the PLC file tab of PLC parameter to the extended data register (D) and extended link register (W).
  • Page 703 DEVICE EXPLANATION (4) Checking the number of device points in special register The number of device points assigned for each file register (ZR), extended data register (D), and extended link register (W) can be checked in the following special registers. •...
  • Page 704 DEVICE EXPLANATION 6) To access the extended data register (D) or extended link register (W) from a module which does not support the use of those devices, device number needs to be specified by that of the file register (ZR). Calculation formulas to obtain device number of the file register (ZR) to be specified to access the extended data register (D) or extended link register (W) and their calculation examples are described below.

  • Page 705: Nesting (N)

    DEVICE EXPLANATION 10.9 Nesting (N) (1) Definition Nesting is a device used in the master control instruction (MC instruction, MCR instruction) to program operation conditions in a nesting structure. (2) Specifying method in master control instruction The master control instruction opens/closes a common ladder bus to create a sequence program of efficient ladder switching.

  • Page 706: Pointer (P)

    DEVICE EXPLANATION 10.10 Pointer (P) (1) Definition Pointer devices are used in jump instructions (CJ, SCJ, JUMP) or subroutine call instructions (CALL). (2) Pointer applications The pointers can be used in the following applications. • Pointers are used in jump instructions (CJ, SCJ, JMP) to designate jump destinations and labels (jump destination beginning).
  • Page 707 DEVICE EXPLANATION (4) Number of available pointer points The number of available pointer points changes depending on the CPU module. Table10.19 Number of available pointer points of each CPU module CPU module Number of points Basic model QCPU 300 points High Performance model QCPU Process CPU 4096 points...
  • Page 708 DEVICE EXPLANATION 10.10.1 Local pointerNote28 Basic Note10.26 (1) Definition Local pointers are pointers which can be used independently in program jump instructions and subroutine call instructions. The same pointer No. can be used in each of the programs. Program A Program B Same pointer is used.
  • Page 709 DEVICE EXPLANATION (3) Precautions for using local pointers (a) Program where local pointers are described Local pointers cannot be used from other program jump instructions and sub- routine CALL instructions. Use an ECALL instruction to call a subroutine subprogram in a program file that contains local pointers.
  • Page 710 DEVICE EXPLANATION 10.10.2 Common pointerNote29 Basic Note10.27 (1) Definition Common pointers are used to call subroutine programs from all programs being executed in the High Performance model QCPU. Program A Program C CALL P204 CALL P0 P204 FEND P205 Program B CALL P205 FEND Label...
  • Page 711 DEVICE EXPLANATION (2) Common pointer range of use In order to use common pointers, the first common pointer No. must be designated at the "PLC system" tab screen in the "(PLC) Parameter" dialog box. A range of common pointers starts from a specified pointer number to P4095. However, only pointer numbers subsequent to the local pointer range can be designated by parameter setting as common pointers.

  • Page 712: Common Pointer

    DEVICE EXPLANATION (3) Precautions for using common pointers (a) When the same pointer No. is used as label The same pointer No. cannot be used again as a label. Such use will result in a pointer configuration error (error code:4021). (b) When the total number of local pointer points exceeds the first number of common pointer If the last number of local pointers used in several programs overlaps the first...

  • Page 713: Interrupt Pointer (I)

    DEVICE EXPLANATION 10.11 Interrupt pointer (I) (1) Definition Interrupt pointers are used as labels at the beginning of interrupt programs. The interrupt pointers can be used in all running programs. Interrupt pointer (interrupt program label) Interrupt program IRET Figure 10.90 Interrupt pointer (2) Number of available interrupt pointer points Table10.20 indicates the number of available interrupt pointer points.
  • Page 714 DEVICE EXPLANATION (3) Interrupt factors Table10.21 indicates the interrupt factors of the interrupt pointers. Table10.21 Interrupt factor classification Applicable CPU module Interrupt Basic High Universal Interrupt factor Description Process Redundant pointer No. model Performance model QCPU model QCPU QCPU Interrupt input from the interrupt *1, *10 I0 to 15 Interrupt module...

  • Page 715: List Of Interrupt Pointer Nos And Interrupt Factors

    DEVICE EXPLANATION 10.11.1 List of interrupt pointer Nos and interrupt factors The following table lists the interrupt pointer Nos. and interrupt factors of each CPU module. (1) Basic model QCPU Table10.22 Interrupt pointer No. and interrupt factor list (Basic model QCPU) Priority I No.
  • Page 716 DEVICE EXPLANATION (2) High Performance model QCPU Table10.23 Interrupt pointer No. and interrupt factor list (High Performance model QCPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking Errors that stop 1st point operation SINGLE PS DOWN 2nd point *3 *4 3rd point...
  • Page 717 DEVICE EXPLANATION * 1 : 1st to 12th points are allocated in order, beginning from the sequence start generator module installed closest to the High Performance model QCPU. * 2 : The time-out period of the internal timer is a default value. It can be changed in 0.5ms units within the range 0.5ms to 1000ms in the PLC system setting of the PLC parameter dialog box.
  • Page 718 DEVICE EXPLANATION (3) Process CPU Table10.24 Interrupt pointer number and interrupt factor list (Process CPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking Errors that stop 1st point operation SINGLE PS DOWN 2nd point *2*3 3rd point UNIT VERIFY ERR.
  • Page 719 DEVICE EXPLANATION * 1 : The time-out period of the internal timer is a default value. It can be changed in 0.5ms units within the range 0.5ms to 1000ms in the PLC system setting of the PLC parameter dialog box. * 2 : This applies to the CPU module with serial No.
  • Page 720 DEVICE EXPLANATION (4) Redundant CPU Table10.25 Interrupt pointer No. and interrupt factor list (Redundant CPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking 1st point Errors that stop operation 2nd point SINGLE PS. DOWN 3rd point UNIT VERIFY ERR.
  • Page 721 DEVICE EXPLANATION (5) Universal model QCPU Table10.26 Interrupt pointer No. and interrupt factor list (Universal model QCPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking 1st point 2nd point 3rd point 4th point 5th point 6th point 7th point I32 to Interrupt...

  • Page 722: Other Devices

    DEVICE EXPLANATION 10.12 Other Devices 10.12.1 SFC block device (BL) This device is used for checking if the block designated by the SFC program is valid. Refer to the following manual for how to use the SFC block device. QCPU (Q Mode)/QnACPU Programming Manual (SFC) 10.12.2 SFC transition device (TR)Note30 Basic...

  • Page 723: I/O No. Designation Device (U)

    DEVICE EXPLANATION 10.12.4 I/O No. designation device (U) (1) Definition I/O No. designation devices are used with instructions dedicated to intelligent function module to designate I/O numbers. (2) Designating the I/O No. designation device I/O No. designation devices are designated with the intelligent function module instructions as shown in Figure 10.92.

  • Page 724: Macro Instruction Argument Device (Vd)

    DEVICE EXPLANATION 10.12.5 Macro instruction argument device (VD) (1) Definition Macro instruction argument devices are used with ladders registered as macros. When a VD setting is designated for a ladder registered as a macro, conversion to the designated device is performed when the macro instruction is executed. (2) Designating macro instruction argument devices Specify the devices transferred from sequence programs to macro registration ladders as macro instruction argument devices among the devices used in the...
  • Page 725 DEVICE EXPLANATION POINT 1. With the macro instruction argument device, VD0 to 9 can be used in one ladder registered as a macro instruction. 2. The GX Developer read mode provides an option to view a program in macro instruction format. (To change the display, choose [View] [Display macro instruction format].) Change of macro...

  • Page 726: Constants

    DEVICE EXPLANATION 10.13 Constants 10.13.1 Decimal constant (K) (1) Definition Decimal constants are devices that designate decimal data in sequence programs. Specify it as K (example: K1234) in a sequence program. It is stored in binary (BIN) into the CPU module. ( Section 3.9.1) (2) Designation range The designation ranges for decimal constants are as follows:...

  • Page 727: Real Number (E)

    DEVICE EXPLANATION Basic 10.13.3 Real number (E)Note31 Note10.29 (1) Definition Real numbers are devices which designate real numbers in the sequence program. Specify it as E (example: K1234) in a sequence program.( Section 3.9.4) EMOVP E1.234 D0 Figure 10.95 Specifying the real number (2) Designation range (a) Setting range of real number The setting range of the real number is as follows:...

  • Page 728: Character String

    DEVICE EXPLANATION (c) The operations when a special value is entered The following table shows the operation when an arithmetic operation where the input data is a special value is performed. Table10.28 Operations when a special value is entered CPU module Nonnumeric number input Basic model QCPU 4100 Error occurrence...

  • Page 729: Convenient Usage Of Devices

    DEVICE EXPLANATION 10.14 Convenient Usage of Devices Basic When executing multiple programs in the CPU module, local devices among the internal user devices can be designated to execute each of the programs in an independent Note10.32 Note10.32 manner. Note33 Basic CPU module devices are classified into "global devices"...
  • Page 730 DEVICE EXPLANATION POINT 1. The devices that have not been set as local devices ( Section 10.14.2) are all global devices. 2. When executing multiple programs, the "shared range" for all programs, and the "independent range" for each program must be designated in advance. Section 10.14.2) Example: Internal relay M0 Shared by all programs...

  • Page 731: Local Devices

    DEVICE EXPLANATION 10.14.2 Local devices Local devices are used independently by the programs. The use of local devices permits programming of multiple "independent execution" programs without regard to other programs. Note that the local device data can be stored to the standard RAM and the memory card (SRAM) only.
  • Page 732 DEVICE EXPLANATION POINT The local device may not be designated with some instructions. Refer to the allowable device in the programming manual of each instruction for details. Remark Refer to Section 10.2 for the concept of the number of words of the devices used as local devices.
  • Page 733 DEVICE EXPLANATION (b) Setting the drive and file name where local devices will be stored After setting the ranges of the devices used as local devices, set the drive and file name, where the local device file will be stored, in the PLC file of the PLC parameter dialog box.
  • Page 734 DEVICE EXPLANATION (c) Write of settings Write the settings made in (a) and (b) to the CPU module. To write them, execute [Write to PLC] on GX Developer. Figure 10.103 Write to device memory POINT 1. Performing the setting to change the size of local device in the standard RAM, with the sampling trace file stored in the standard RAM, clears the sampling trace file.
  • Page 735 DEVICE EXPLANATION (4) Setting whether to use a local device (use for each Universal program) Note10.34 Note35 Setting whether to use a local device for each program can reduce the scan time. For Note10.34 the Universal model QCPU, the size of the local device file can be reduced because the programs not using a local device does not create the area for saving and restoring data.
  • Page 736 DEVICE EXPLANATION (b) Precautions 1) Changing local device For programs set to "Not used" for local device, do not change or refer to the local device. When the local device is changed by a program that does not use local device, the changed value will not be held.
  • Page 737 DEVICE EXPLANATION (5) Using local devices used by the file where a subroutine program is stored It is possible to use local devices that are used by the file where a subroutine program is stored when executing a subroutine program. Whether or not such local devices are used is set by special relay (SM776) ON/OFF setting.
  • Page 738 DEVICE EXPLANATION (c) Precautions • If SM776 is ON, the local device data is read when the subroutine program is called and the local device data is saved after the execution of the RET instruction. Accordingly, scan time is elongated by the time as when a subroutine program is executed once with the setting of "SM776: ON".
  • Page 739 DEVICE EXPLANATION (b) Operation at "SM777 : ON" File name: DEF File name: ABC (Stand-by type program) DECP Occurrence of interrupt Execution of the Interrupt program INCP interrupt program IRET Read/write of the Local devices used by local devices Local devices used by the file name: ABC the file name: DEF Figure 10.109 When SM777 is ON...

  • Page 740: Chapter11 Cpu Module Processing Time

    CPU MODULE PROCESSING TIME CHAPTER11 CPU MODULE PROCESSING TIME This chapter explains the CPU module processing time. 11.1 Scan Time This section explains the scan time structures and CPU module processing time. 11.1.1 Scan time structure The CPU module scan time consists of the followings processings. The CPU module performs the following processings cyclically in the RUN status.
  • Page 741 CPU MODULE PROCESSING TIME (2) Scan time structure of High Performance model QCPU Processing in RUN status Program check I/O refresh time I/O refresh Section11.1.2 (1)) END processing of DUTY instruction END processing time and (No processing performed the relevant instruction when DUTY instruction is not executed) Section11.1.2 (3)) Program execution...
  • Page 742 CPU MODULE PROCESSING TIME (3) Scan time structure of Process CPU Processing in RUN status Program check I/O refresh time I/O refresh Section11.1.2 (1)) END processing time and the END processing of DUTY instruction relevant instruction (No processing performed Section11.1.2 (3)) when DUTY instruction is not executed) Program execution Instruction execution time...
  • Page 743 CPU MODULE PROCESSING TIME (4) Scan time structure of Redundant CPU Processing in RUN status Program check I/O refresh I/O refresh time Section11.1.2 (1)) Tracking processing Backup mode/ Control/Standby Standby system system identification Backup/Separate mode Tracking processing time identification Section11.1.2 (2)) Backup mode/Control system Separate mode/Control system Separate mode/Standby system *...
  • Page 744 CPU MODULE PROCESSING TIME (5) Scan time structure of Universal model QCPU Processing in RUN status Program check I/O refresh time I/O refresh Section11.1.2 (1)) END processing of DUTY instruction END processing time and (No processing performed the relevant instruction when DUTY instruction is not executed) Section11.1.2 (3)) Program execution...

  • Page 745: Time Required For Each Processing Included In Scan Time

    (I/O refresh time) = (number of input points/16) N1 + (number of output points/ Refer to Table11.1 for N1 and N2. Table11.1 I/O refresh time CPU module QA1S6 QA1S6 Q00JCPU 2.05 s 2.95 s ---- ---- ---- 1.25 s 2.20 s...
  • Page 746 In this case, the END processing time changes with the number of times specified Note11.2 in the DUTY instruction.Note2 Table11.2 END processing during DUTY instruction execution END processing time CPU module When set to 1 When set to 5 Q00JCPU 0.15ms 0.21ms Q00CPU 0.14ms 0.19ms Q01CPU 0.12ms 0.16ms Q02CPU 0.02ms...
  • Page 747 With high- Without high- With high- Without high- With high- speed start speed start speed start speed start speed start speed start Q00JCPU 175 s 150 s ---- ---- 350 s 325 s Q00CPU 145 s 125 s ---- ----...
  • Page 748 CPU MODULE PROCESSING TIME Table11.4 Program-end overhead time of interrupt program (B2) CPU module Without high-speed start With high-speed start Q00JCPU 175 s 150 s Q00CPU 145 s 125 s Q01CPU 135 s 120 s Q02CPU 180 s 75 s...
  • Page 749 CPU MODULE PROCESSING TIME 1) Overhead time taken when local devices in interrupt program are made Basic Note11.4 available Note5 Note11.4 When SM777 (setting of whether local devices in interrupt program are enabled or disabled) is turned ON to make the local devices in the interrupt program available, the following time is added to the overhead time in Table11.6 and Table11.7.
  • Page 750 (SM213 turns ON) is issued. Table11.8 Calendar update processing time END processing time CPU module When clock data set request is When clock data read request is issued issued Q00JCPU 1.25 ms 0.04 ms Q00CPU 0.99 ms 0.03 ms Q01CPU 0.98 ms 0.02 ms...
  • Page 751 CPU MODULE PROCESSING TIME High Note11.5 Note11.6 Basic (c) Program memory check processing time Note6 Performance This indicates the time taken to make a program memory check when it has been Note11.5 Note11.5 set in the PLC parameter dialog box of GX Developer. Time required for program memory check Universal Check capacity per scan (step)
  • Page 752 CPU MODULE PROCESSING TIME (6) Module refresh time The module refresh time is the sum of refresh times taken by MELSECNET/H, CC- Link and others. (a) Refresh of CC-Link IE controller network This indicates the time taken to refresh data between the link devices of the CC- Link IE controller network module and those of the CPU module.
  • Page 753 (Refresh time) = KN1 + KN2 (number of refresh points) Use the following values in Table11.10 for KN1 and KN2. Table11.10 When intelligent function module is mounted on main base unit CPU module Q00JCPU 115 s 55 s Q00CPU 91 s...
  • Page 754 Table 11.12 shows the processing time at monitoring data by GX Developer. Table11.12 Monitor processing time by GX Developer When connected to RS-232 of host station When connected to other station Function CPU module Q00JCPU Q00CPU Q01CPU Q00JCPU Q00CPU Q01CPU 1.6ms...
  • Page 755 CPU MODULE PROCESSING TIME (b) High Performance model QCPU, Process CPU, Redundant CPU Tables 11.13 and 11.14 show the processing time at monitoring data or setting the monitor condition by GX Developer. Table11.13 When 32 points of data registers have been set in device registration monitor CPU module Processing time Q02CPU...
  • Page 756 (9) Common processing time This indicates the processing time common to the CPU modules. Table11.17 shows the common processing time for each CPU module model. Table11.17 Common processing time CPU module Common processing time Q00JCPU 0.66ms Q00CPU 0.60ms Q01CPU 0.52ms Q02CPU 0.40ms...
  • Page 757 CPU MODULE PROCESSING TIME High Basic Performance Process (11)Latch processing time of device data Note11.8 Note8 The scan time will be prolonged by the time shown below when the latch range is set Note11.8 Note11.8 Note11.8 *1*2*3 in the PLC parameter device setting. Redundant The definition of N1, N2, and N3 in the following table is as follows: •...

  • Page 758: Factors That Increase The Scan Time

    CPU MODULE PROCESSING TIME 11.1.3 Factors that increase the scan time When the following functions or operations are performed, this will increase the scan time of the CPU module. When executing any of them, make sure to allow for the processing time (the value given in this section to the value calculated in Section 11.1.2).
  • Page 759 CPU MODULE PROCESSING TIME (2) Use of local devices Note11.10 Note11 Basic When local devices are used, the following processing time shown in Table11.19 is required. Note11.10 The definition of n, N1, N2, and N3 in the following table is as follows: •...
  • Page 760 CPU MODULE PROCESSING TIME (a) Scan time increased when local devices in subroutine program are made available When SM776 (setting of whether local devices are usable or not when the subroutine program is called) is turned ON to make the local devices in the subroutine program available, the scan time increases per call by the time indicated in Table11.21 and Table11.22.
  • Page 761 CPU MODULE PROCESSING TIME (3) Overheard time taken to execute multiple programs Note11.11 Note12 Basic This indicates the overhead time taken to execute multiple programs by the CPU Note11.11 module. When multiple programs are executed, the following processing time shown in Table11.23 is required.
  • Page 762 CPU MODULE PROCESSING TIME (5) Use of file registers When a file register is used, the processing time shown in Table 11.25 occurs when [Use the same file name as the program.] is selected in the parameter setting. When [Use the following file.] is selected, the scan time will not be prolonged. Table11.25 Processing time taken when file registers are used CPU module Processing time...
  • Page 763 The scan time increases by the value indicated in Table 11.23 after online change. Table11.26 Increased time when online change is in ladder mode Allocate memory for online change CPU module model name No change Re-setting Q00JCPU Max. 2.1ms Max. 30ms Q00CPU Max. 1.7ms Max. 26ms Q01CPU Max.
  • Page 764 12 intelligent function modules mounted on one extension base unit. Table11.28 Scan time increased when system monitor is used (When a total of 12 intelligent function modules are mounted) CPU module model name Scan time increase Q00JCPU 0.036ms Q00CPU 0.015ms Q01CPU 0.011ms...
  • Page 765 CPU MODULE PROCESSING TIME (9) Execution of the memory check function Note11.14 Note15 High Performance Basic When the memory check function is executed on a CPU module, the scan time increases by the processing time of the memory check function. For the processing Note11.14 Note11.14 time, refer to Section 6.28.
  • Page 766 CPU MODULE PROCESSING TIME (11)Program memory batch transfer Note11.16 High Basic Performance Process When executing the program memory batch transfer by GX Developer, the processing time shown in Table11.30 is generated.Note17 Note11.16 Note11.16 Note11.16 Table11.30 Scan time prolonging time when transferring data from program cache memory to Redundant program memory Note11.16...

  • Page 767: Factors That Can Shorten Scan Time By Changing The Settings

    CPU MODULE PROCESSING TIME 11.1.4 Factors that can shorten scan time by changing the settings The scan time can be shortened by changing the PLC parameter settings of GX Developer described in this section. (1) A series CPU compatibility setting ( Section 9.1.2(2)) Note11.20 Note21...
  • Page 768 CPU MODULE PROCESSING TIME (2) Floating point arithmetic processing ( Section 9.1.2(2)) Note11.21 Note22 Basic Process Redundant The time required for the arthmetic processing of the instruction using a floating point can be shortened by selecting "Do not perform internal operation processing with Note11.21 Note11.21 Note11.21 double precision"...
  • Page 769 CPU MODULE PROCESSING TIME (3) File usability setting ( Section 9.1.2(7)) Note11.22 Note23 Basic Universal In the program that does not use the file register, device initial value or device Note11.22 Note11.22 comment file, the overhead time of the program can be shortened by selecting "Not used"...
  • Page 770 CPU MODULE PROCESSING TIME POINT Time reduction by this setting is enabled only when "Use the same file name as the program" is selected in the PLC file. Valid only when setting is "Use the same file name as program". Figure 11.10 PLC file - 31 11.1 Scan Time...

  • Page 771: Other Processing Times

    With monitor, CPU module without user without user with user interrupt with user interrupt interrupt interrupt Sum of the following times Q00JCPU 0.20ms 0.90ms 1) Time indicated in the "With Interrupt program execution monitor, without user Q00CPU 0.12ms 0.60ms time (refer to Section 11.1.2 interrupt"...

  • Page 772: Chapter12 Procedure For Writing Program To Cpu Module 12 - 1 To

    CPU module. ( Section 5.4.3(1)) The program capacities executable in CPU modules are shown in Table12.1. Table12.1 Program capacity of Basic model QCPU CPU module Program capacity Q00JCPU 8k steps (32k bytes) Q00CPU 8k steps (32k bytes) Q01CPU 14k steps (56k bytes)

  • Page 773: Hardware Check

    Is the RUN LED on? To Section 12.1.3 Is the ERR. LED off? Please contact your nearest local Mitsubishi service center or representative, explaining a detailed description of the problem. Choose [Diagnostics] [System Monitor] on GX Developer or perform [PLC...
  • Page 774 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Remark Refer to the following manual for the installation and mounting procedures of the CPU module. QCPU User's Manual (Hardware Design, Maintenance and Inspection) 12.1 Basic Model QCPU 12.1.2 Hardware check...

  • Page 775: Procedure For Writing Program

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.1.3 Procedure for writing program This section explains the procedure for writing the parameters and program created by GX Developer to the Basic model QCPU. This section explains the procedure for writing a program to the program memory ( Section 5.1.2).
  • Page 776 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Section 6.26 Set the device memory. Section 6.26 Set the device initial value range. In the PLC file setting of the PLC Section 6.26 parameter dialog box, set the device initial value to "Use"...

  • Page 777: Boot Run Procedure

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.1.4 Boot run procedure This section explains a boot run procedure. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the Basic model QCPU side. Section 12.1.3 Start (Continued from Section 11.1.3) When the RUN/STOP/RESET switch is in the RUN position, set the switch to...

  • Page 778: High Performance Model Qcpu, Process Cpu, Redundant Cpu, Universal Model Qcpu

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.2 High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU 12.2.1 Items to be examined for program creation When creating programs by the CPU module, it is necessary to predetermine the program capacity, device points, file name and others of each program.
  • Page 779 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE (5) Device initial value setting Set the data necessary as the initial values to the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU device memory and intelligent function module buffer memory. ( Section 6.26) (6) Examination of boot run When executing boot run, make the boot file setting of the PLC parameter dialog box.

  • Page 780: Hardware Check

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.2.2 Hardware check Make a hardware check before writing the created program. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU side.
  • Page 781 Is the RUN LED of the CPU module To Section 12.2.3 Is the ERR. LED off? Please contact your nearest local Mitsubishi service center or representative, explaining a detailed description of the problem. Choose [Diagnostics] [System Monitor] on GX Developer or perform [PLC...

  • Page 782: Procedure For Writing One Program

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.2.3 Procedure for writing one program This section explains the procedure for writing the parameters and program created by GX Developer to the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU. This section explains the procedure for writing a program to the program memory Universal Section 5.2.2).
  • Page 783 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Section 6.26 Set the device memory. Section 6.26 Section 6.26 Set the device initial value range. Section 6.26 In the PLC file setting of the PLC Section 6.26 Section 6.26 parameter dialog box, set the device initial value file name.
  • Page 784 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Choose [Online] [Format PLC Write to PLC screen memory] on GX Deveoper, and format the program memory..... Choose [Online] [Write to PLC] on GX Deveoper, and write the parameters, created program and device initial values. Power the PLC OFF and then ON, or QCPU User's Manual reset the CPU module.

  • Page 785: Procedure For Writing Multiple Programs

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.2.4 Procedure for writing multiple programs This section explains the procedure for writing the parameters and multiple programs created by GX Developer to the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU. This section explains the procedure for writing the programs to the program memory Section 5.2.2).
  • Page 786 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Section 6.26 Set the device memory. Set the device initial value range. Section 6.26 In the PLC file setting of the PLC Section 6.26 parameter dialog box, set the device initial value file name.
  • Page 787 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Connect the personal computer, which is installed with GX Developer, to the CPU module. Set the RUN/STOP switch to STOP and the RESET/L.CLR switch to the neutral position, and power ON the PLC (the ERR.
  • Page 788 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Is the ERR. LED of the CPU module on (flickering)? Choose [Diagnostics] [System Monitor] on GX Developer or perform [PLC QCPU User's Manual (Hardware Design, Diagnostics] to check the error factor, and Maintenance and Inspection) remove the error factor.

  • Page 789: Boot Run Procedure

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 12.2.5 Boot run procedure This section explains a boot run procedure. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the High Performance model QCPU, Process CPU, Redundant CPU or Universal model QCPU side.

  • Page 790: Appendices

    APPENDICES APPENDICES Appendix 1 Special Relay List Special relays, SM, are internal relays whose applications are fixed in the Programmable Controller. For this reason, they cannot be used by sequence programs in the same way as the normal internal relays. However, they can be turned ON or OFF as needed in order to control the CPU module and remote I/O modules.
  • Page 791 APPENDICES (1) Diagnostic Information TableApp.2 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Turns ON if an error occurs as a result of diagnosis. (Includes when an annunciator is ON, and when an Qn(H) error is detected with CHK instruction) S (Error)
  • Page 792 APPENDICES TableApp.2 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • ON when operation error is generated OFF : Normal SM56 Operation error • Remains ON if the condition is restored to normal S (Error) M9011 ON : Operation error thereafter.
  • Page 793 APPENDICES Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Turns ON when writing to the program cache memory. Program memory OFF : End • Turns OFF when the program batch transfer is SM165 batch transfer ON : Not executed or not S (Status change) completed.
  • Page 794 APPENDICES TableApp.3 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) OFF : Check device range • Selects whether or not to check the device range by Device range check SM237 ON : Do not check device the BMOV/FMOV instruction (Only when the sub-set inhibit flag range...
  • Page 795 APPENDICES TableApp.3 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Effective for the batch refresh (also effective for the Qn(H) low speed cyclic) QnPH • Designate whether to receive arrival stations only or QnPRH to receive all slave stations in the MELSECNET/H.
  • Page 796 APPENDICES TableApp.3 Special relay Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU • The SFC program starting mode in the SFC setting of the PLC parameter dialog box is set as the initial SFC program start OFF : Initial start M9102form SM322...
  • Page 797 APPENDICES (3) System clocks/counters TableApp.4 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) S (Every END SM400 Always ON • Normally is ON M9036 processing) S (Every END SM401 Always OFF • Normally is OFF M9037 processing) •...
  • Page 798 APPENDICES TableApp.4 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • This relay alternates between ON and OFF at intervals of the time (unit: ms) specified in SD415. • When Programmable Controller power supply is Qn(H) turned OFF or a CPU module reset is performed, QnPH...
  • Page 799 APPENDICES (6) Drive information TableApp.7 Special relay Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Memory card (A) OFF : Unusable SM600 • ON when memory card (A) is ready for use by user S (Status change) usable flags ON : Use enabled Memory card (A)
  • Page 800 APPENDICES TableApp.7 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Qn(H) OFF : File register not used SM650 Comment use • Goes ON when comment file is in use S (Status change) QnPH ON : File register in use QnPRH OFF : Internal memory Qn(H)
  • Page 801 APPENDICES (7) Instruction-Related Special Relays TableApp.8 Special relay Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU OFF : Carry OFF S (Instruction SM700 Carry flag • Carry flag used in application instruction M9012 ON : Carry ON execution) Switching the number of Qn(H)
  • Page 802 APPENDICES TableApp.8 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) OFF : SFC comment readout instruction is • Turns on the instructions, (S(P).SFCSCOMR) to Qn(H) SFC comment readout inactivated. read the SFC step comments and (S(P). SM735 instruction in S (status change)
  • Page 803 APPENDICES TableApp.8 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Turns ON when the number of the remaining blocks Block information of the dedicated instruction transmission area used using dedicated S (When OFF : Block is secured for the dedicated instruction of Multiple CPU high instruction of Multiple instruction/END...
  • Page 804 APPENDICES (8) Debug TableApp.9 Special relay Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Qn(H) • Switches ON when the trace preparation is QnPH Trace preparation S (Status change) completed QnPRH OFF : Not ready SM800 ON : Ready Sampling trace •...
  • Page 805 APPENDICES TableApp.9 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) OFF : Not ready SM820 Step trace preparation • Goes ON after program trace registration, at ready S (Status change) ON : Ready • Select whether execution of step trace is started or OFF : Suspend suspended.
  • Page 806 APPENDICES (10)A to Q/QnA conversion correspondences Special relays SM1000 to SM1255 are the relays which correspond to ACPU special relays M9000 to M9255 after A to Q/QnA conversion. (However, the Basic model QCPU, Redundant CPU, and Universal model QCPU do not support the A to Q/QnA conversion.) These special relays are all set by the system, and cannot be set by the user program.
  • Page 807 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification • Turns ON if an instantaneous power failure of within 20ms occurs during use of the AC power supply module. Qn(H) •...
  • Page 808 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification • Alternates between ON and OFF according to the seconds specified at SD414. (Default: n = 30) 2n minute clock(1 • Not turned on or off per scan but turned on and off even –...
  • Page 809 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification OFF : Other than when P, I Main side P, I set set being requested M9056 SM1056 request ON : P, I set being •...
  • Page 810 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification OFF : Continuous transition Presence/absence • Set whether continuous transition will be performed for the not effective M9103 SM1103 SM323 of continuous block where the "continuous transition bit"...
  • Page 811 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification ZNRD instruction • Depends on whether or not the ZNRD (word device read) (LRDP instruction instruction has been received. OFF : Not accepted –...
  • Page 812 APPENDICES TableApp.11 Special relay ACPU Special Special Corresponding Special Relay after Relay for Name Meaning Details Relay Conversion Modification Local station, remote I/O station OFF : No errors Depends on whether or not a local or a remote I/O station –...
  • Page 813 APPENDICES (12)Process control instructions TableApp.13 Special relay Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU • Specifies whether or not to hold the output value OFF : No-hold SM1500 Hold mode when a range over occurs for the S.IN instruction ON : Hold Q4AR range check.
  • Page 814 APPENDICES TableApp.14 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Turns on when the CPU module is started up by the S (Status operation system switch. Q4AR change)/U • Reset using the user program. OFF : Power supply on CPU module startup startup...
  • Page 815 APPENDICES TableApp.14 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) SM1549 SM1549 Block 30 SM1550 SM1550 Block 31 SM1551 SM1551 Block 32 SM1552 SM1552 Block 33 SM1553 SM1553 Block 34 SM1554 SM1554 Block 35 SM1555 SM1555 Block 36...
  • Page 816 APPENDICES TableApp.14 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Sets the operation for the case accessing buffer memory of the intelligent function module mounted on the extension base unit from the standby system CPU in separate mode.
  • Page 817 APPENDICES TableApp.15 Special relay Corresp onding Set by Corresponding Number Name Meaning Explanation Host (When Set) • Turns on when a diagnostics error occurs. (Includes Other system OFF : No error error detection when annunciator is ON, and by CHK SM1610 S (Each END) diagnostics error...
  • Page 818 APPENDICES (15)For redundant system (tracking) Either the backup mode or the separate mode is valid for SM1700 to SM1799. All is turned off for stand-alone system. TableApp.16 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Tracking execution OFF : Execution not possible •...
  • Page 819 APPENDICES TableApp.16 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) SM1712 SM1712 Block 1 SM1713 SM1713 Block 2 SM1714 SM1714 Block 3 SM1715 SM1715 Block 4 SM1716 SM1716 Block 5 SM1717 SM1717 Block 6 SM1718 SM1718 Block 7...
  • Page 820 APPENDICES TableApp.16 Special relay Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) SM1760 SM1760 Block 49 SM1761 SM1761 Block 50 SM1762 SM1762 Block 51 SM1763 SM1763 Block 52 <In the case of Q4AR> SM1764 SM1764 Block 53 Turns ON only during one SM1765 SM1765...

  • Page 821: Appendix 2 Special Register List

    APPENDICES Appendix 2 Special Register List The special registers, SD, are internal registers with fixed applications in the Programmable Controller. For this reason, it is not possible to use these registers in sequence programs in the same way that normal registers are used. However, data can be written as needed in order to control the CPU modules and remote I/O modules.
  • Page 822 APPENDICES (1) Diagnostic Information TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation (When Set) ACPU D9008 Diagnostic Diagnosis error • Error codes for errors found by diagnosis are stored as BIN data. S (Error) format errors code •...
  • Page 823 APPENDICES TableApp.19 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU • Common information corresponding to the error codes (SD0) is stored here. • The following ten types of information are stored here: • The error common information type can be judged by the "common information category code"...
  • Page 824 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Time (value set) Number Meaning Time : 1 s units (0 to 999 s) Time : 1ms units (0 to 65535ms) SD10 (Empty) SD11 SD12 SD13 SD14...
  • Page 825 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Reason(s) for system switching Number Meaning System switching condition Control system switching instruction argument SD10 (Empty) SD11 SD12 SD13 SD14 SD15 *13: Details of reason(s) for system switching 0 : No system switching condition (default) 1 : Power-OFF, reset, hardware failure,...
  • Page 826 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Tracking transmission data classification Stores the data classification during tracking. Number Meaning Data type SD10 (Empty) SD11 SD12 SD13 SD14 SD15 *15: Details of data classification Error common Error common SD10...
  • Page 827 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Individual information corresponding to error codes (SD0) is stored here. • There are the following eight different types of information are stored. • The error individual information type can be judged by the "individual SD16 information category code"...
  • Page 828 APPENDICES Remark *6 : Extensions are shown below. TableApp.20 Extension name SDn+1 Extension File Type Name Higher 8 bits Lower 8 bits Higher 8 bits Parameters • Sequence program • SFC program Device comment Initial device value File register Simulation data (For QnA) Local device (Other than the Basic model QCPU)
  • Page 829 APPENDICES TableApp.19 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Reason(s) for system switching failure Number Meaning System switching prohibition SD16 condition 14 SD17 SD18 SD19 SD20 SD21 (Vacancy) SD22 SD23 SD24 SD25 SD26 *14: Details of reason(s) for system switching failure QnPRH 0 : Normal switching completion...
  • Page 830 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Error number that SD50 Error reset performs error • Stores error number that performs error reset rese • All corresponding bits go 1(ON) when battery voltage drops. •...
  • Page 831 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Annunciator Annunciator S (Instruction SD62 • The first annunciator number (F number) to be detected is stored here. D9009 number number execution) Number of Number of S (Instruction SD63...
  • Page 832 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Stores the transmission Transmission speed specified in : 9.6kbps, : 19.2kbps, 384 : 38.4kbps, S (Power-ON or SD100 speed storage the serial : 57.6kbps, 1152 : 115.2kbps reset)
  • Page 833 APPENDICES TableApp.19 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • The numbers of output modules whose fuses have blown are input as a SD130 bit pattern (in units of 16 points). (If the module numbers are set by parameter, the parameter-set SD131 numbers are stored.) Bit pattern in units...
  • Page 834 APPENDICES (2) System information TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation (When Set) ACPU • The switch status of the remote I/O module is stored in the following format. b4 b3 S (Always) Empty 1) Remote I/O module switch statusAlways 1: STOP •...
  • Page 835 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • The following bit patterns store the status of the LEDs on the CPU module: • 0 is off, 1 is on, and 2 is flicker. b12b11 b8 b7 b4 b3...
  • Page 836 APPENDICES TableApp.21 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU • The operating status of the remote I/O module is stored in the following format. b4 b3 S (Always) 1) Remote I/O module operating statusAlways 2: STOP •...
  • Page 837 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) 0: Test not yet executed 1: During X device Device test test SD206 • Set when the device test mode is executed on GX Developer. S (Request) 2: During Y device execution type...
  • Page 838 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • The year (first two digits) and the day of the week are stored as BCD code as shown below. Example: 1993, Friday 1905 Clock data QCPU Day of the week...
  • Page 839 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Fixed to 0 Base type Main base unit differentiation Qn(H) 1st extension 0: QA**B is A/Q base QnPH S (Initial) base installed differentiation QnPRH Fixed to 0 (A mode) 2nd extension...
  • Page 840 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Number of • Indicates the number of mounted MELSECNET/10 modules or SD254 modules installed MELSECNET/H modules. • Indicates I/O number of mounted MELSECNET/10 module or SD255 I/O No.
  • Page 841 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) 1) When Xn0 of the mounted CC-Link module turns ON, the bit of the corresponding station turns to 1 (ON). 2) When either Xn1 or XnF of the mounted CC-Link module turns OFF, the bit of the corresponding station turns to 1 (ON).
  • Page 842 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Stores the number of points of index register (Z) to be modified in the Device 16 bit modification range of 16 bits. SD305 assignment Number of points S (Initial)
  • Page 843 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) No. of modules SD340 • Indicates the number of mounted Ethernet module. installed SD341 I/O No. • Indicates I/O No. of mounted Ethernet module Network SD342 •...
  • Page 844 APPENDICES TableApp.21 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Number of • The number of CPU modules that comprise the multiple CPU system is Q00/Q01 SD393 multiple CPUs stored. (1 to 3, Empty also included) •...
  • Page 845 APPENDICES (4) Scan information TableApp.23 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Qn(H) Execution Program No. in • Program number of program currently being executed is stored as BIN S (Status SD500 QnPH program No.
  • Page 846 APPENDICES TableApp.23 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Minimum scan SD524 time (in 1 ms • Stores the minimum value of the scan time into SD524 and SD525. units) Minimum scan (Measurement is made in 100 s units.) S (Every END time SD524: Stores the ms place.
  • Page 847 APPENDICES (5) Drive information TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Indicates the type of the memory card installed. b8 b7 b4 b3 Qn(H) 0: Does not exist Memory card S (Initial and QnPH Drive 1 Memory card typs...
  • Page 848 APPENDICES TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • The use conditions for memory card (A) are stored as bit patterns . (In use when ON) • The significance of these bit patterns is indicated below: b0 : Boot operation (QBT) b8 : Not used b1 : Parameters (QPA)
  • Page 849 APPENDICES TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Indicates the drive 3/4 type. Qn(H) Drive 3 QnPH S (Initial) (Standrd Fixed to 1 QnPRH RAM) Drive 4 (Standrd Fixed to 3 ROM) Drive 3/4 typs Drive 3/4 typs...
  • Page 850 APPENDICES TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • The conditions for usage for drive 3/4 are stored as bit patterns. (In use when ON) • The significance of these bit patterns is indicated below: b0 : Boot operation (QBT) b8 : Not used b1 : Parameters (QPA)
  • Page 851 APPENDICES TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Stores file register file name (with extension) selected at parameters or SD641 by use of QDRSET instruction as ASCII code. SD642 SD641 2nd character 1st character SD643 SD642...
  • Page 852 APPENDICES TableApp.24 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Stores information of parameter storage destination drive which is enabled. Parameter Parameter enable 0: Drive 0 (Program memory) SD670 enable drive S (Initial) drive No.
  • Page 853 APPENDICES Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Stores the last 2 digits of year and month when data is restored in 2-digit BCD code. Example: Restore time SD676 July, 1993 (Year and month) 9307 Year Month...
  • Page 854 APPENDICES (6) Instruction-Related Registers TableApp.25 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation (When Set) ACPU Q00J/Q00/Q01 SD705 • During block operations, turning SM705 ON makes it possible to use the Qn(H) mask pattern being stored at SD705 (or at SD705 and SD706 if double Mask pattern Mask pattern QnPH...
  • Page 855 APPENDICES TableApp.25 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) SD738 • Stores the message designated by the MSG instruction. SD739 SD740 2nd character 1st character SD738 SD741 SD739 4th character 3rd character SD742 SD740 6th character 5th character...
  • Page 856 APPENDICES TableApp.25 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation ACPU (When Set) • Selects whether or not the data is refreshed when the COM instruction is executed. • Designation of SD778 is made valid when SM775 turns ON. 0/1 0/1 0/1 SD778 I/O refresh...
  • Page 857 APPENDICES TableApp.25 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • Selects whether or not the data is refreshed when the COM instruction is executed. • Designation of SD778 is made valid when SM775 turns ON. SD778 0/1 0/1 I/O refresh...
  • Page 858 APPENDICES TableApp.25 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Maximum number of • Specifies the maximum number of blocks used for the dedicated blocks used for instruction of Multiple CPU high speed transmission (target CPU = CPU dedicated No.1).
  • Page 859 APPENDICES (7) Debug TableApp.26 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU • Stores file name (with extension) from point in time when status latch SD806 was conducted as ASCII code. SD807 SD806 2nd character 1st character SD808 SD807...
  • Page 860 APPENDICES (8) Latch area TableApp.27 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation (When Set) ACPU Drive where Access file drive S (Status SD900 power was number during • Stores drive number if file was being accessed during power loss. change) interrupted power loss...
  • Page 861 APPENDICES (10)Remote password count TableApp.29 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Direct SD979 MELSOFT connection SD980 Connection 1 to SD995 MELSOFT Count of unlock Stores the count of unlock processing failures. S (Status SD997 connection processing...
  • Page 862 APPENDICES (11)A to Q/QnA conversion ACPU special registers D9000 to D9255 correspond to Q/QnA special registers SD1000 to SD1255 after A to Q/QnA conversion. (However, the Basic model QCPU, Redundant CPU, and Universal model QCPU do not support the A to Q/QnA conversion.) These special registers are all set by the system, and cannot be set by the user program.
  • Page 863 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • When fuse blown modules are detected, the first I/O number of the lowest number of the detected modules is stored in hexadecimal. (Example: When fuses of Y50 to 6F output modules have blown, "50"...
  • Page 864 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • When one of F0 to 2047 is turned on by OUT F Qn(H) , the F number, which has been detected earliest among SET F QnPH the F numbers which have turned on, is stored in BIN code.
  • Page 865 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion 0: Main program (ROM) 1: Main program (RAM) 2: Subprogram 1 (RAM) 3: Subprogram 2 (RAM) 4: Subprogram 3 (RAM) 5: Subprogram 1 (ROM) Program •...
  • Page 866 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • The day of the week is stored as BCD code as shown below. Example: Friday H0005 Day of the week Clock data –...
  • Page 867 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion Transition condition • Stores the transition condition number, where error code 84 occurred D9053 SD1053 Error transition number where error in an SFC program, in BIN value. occurred Stores "0"...
  • Page 868 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • Output module numbers (in units of 16 points), of which fuses have D9100 SD1100 blown, are entered in bit pattern. (Preset output module numbers when parameter setting has been performed.) D9101 SD1101...
  • Page 869 APPENDICES TableApp.28 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • When any of F0 to 2047 is turned on by , the annunciator SET F D9125 SD1125 SD64 numbers (F numbers) that are turned on in order are registered into D9125 to D9132.
  • Page 870 APPENDICES (12)Special register list dedicated for QnA TableApp.30 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion Stores the execution result of the ZNRD (word device read) 0 : Normal end instruction ZNRD 2 : ZNRD instruction •...
  • Page 871 APPENDICES TableApp.30 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion • Loopback in forward loop only 0 : Forward loop, during data link Master 1 : Reverse loop, Station Station Station station Station No.1...
  • Page 872 APPENDICES TableApp.30 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion Local station parameters non-conforming; Stores conditions for – D9220 SD1220 remote I/O up to numbers 1 to 16 station I/O assignment Stores the local station numbers which contain mismatched error parameters or of remote station numbers for which incorrect I/O...
  • Page 873 APPENDICES TableApp.30 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion Local station and remote I/O Stores conditions for – D9232 SD1232 station loop up to numbers 1 to 8 error Stores the local or remote station number at which a forward or reverse loop error has occurred Local station and remote I/O...
  • Page 874 APPENDICES TableApp.30 Special register Special ACPU Special Register Corresponding Special Register for Name Meaning Details after Register Modification Conversion Local station Stores conditions for – D9248 SD1248 up to numbers 1 to 16 Stores the local station number which is in STOP or PAUSE mode. operation status Device number...
  • Page 875 APPENDICES (14)QCPU with built-in Ethernet port TableApp.32 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Stores the operation result of the time setting function. Operation Stores 0: Not executed SD1270 result operationresult. 1: Success FFFF : Failure Stores years (last two digits of the Christian Era) and monthes by two digits...
  • Page 876 APPENDICES (15)I/O module verification TableApp.33 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation (When Set) ACPU SD1400 • When the I/O modules whose I/O module information differs from that D9116 registered at power-ON are detected, the numbers of those I/O modules SD1401 D9117 are entered in bit pattern.
  • Page 877 APPENDICES (17)For redundant systems (Host system CPU information SD1510 to SD1599 are only valid for redundant systems. They are all set to 0 for stand-alone systems. TableApp.35 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation (When Set) ACPU Operation mode Hot start switch...
  • Page 878 APPENDICES TableApp.35 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation ACPU (When Set) • Stores the reason(s) for system switching failure. 0: System switching normal (default) 1: Tracking cable is not connected , tracking cable error, FPGA circuit failure.
  • Page 879 APPENDICES (18)For redundant systems (Other system CPU information SD1600 to SD1659 is only valid during the back up mode for redundant systems, and refresh cannot be done when in the separate mode. SD1651 to SD1699 are valid in either the backup mode or separate mode. When a stand-alone system SD1600 to SD1699 are all 0.
  • Page 880 APPENDICES TableApp.36 Special register Corres- Set by ponding Corresponding Number Name Meaning Explanation ACPU (When Set) • If an error is detected by the error check for redundant system, the corresponding bit shown below turns ON. That bit turns OFF when the error is cleared after that.
  • Page 881 APPENDICES TableApp.36 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) Stores the operation information of the other system CPU module in the following format. "00FF " I stored when a communication error occurs, or when in debug mode.
  • Page 882 APPENDICES (19)For redundant systems (Trucking) SD1700 to SD1779 is valid only for redundant systems. These are all 0 for stand-alone systems. TableApp.37 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set) • When the tracking error is detected, count is added by one. Tracking error Tracking error Q4AR...
  • Page 883 APPENDICES (20)Redundant power supply module information SD1780 to SD1789 are valid only for a redundant power supply system. The bits are all 0 for a singular power supply system. TableApp.38 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When Set)

  • Page 884: Appendix 3 List Of Parameter No

    APPENDICES Appendix 3 List of Parameter No. The parameter No. is stored into the special register (SD16 to 26), when an error occurs in the parameter settings. The table for the parameter No. and parameter setting area is shown in this section. Refer to Section 9.3 for the explanation of mn, **, M, N in the "Parameter No."...
  • Page 885 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance No. of PLC 0E00 Section 9.1.1(11) Operating mode 0E01 Section 9.1.2(12) All CPUs can read all inputs I/O sharing when QCPU User’s Manual 0E04 using Multiple CPUs All CPUs can read all outputs (Muitiple CPU System) Low speed Section 9.1.1(2)
  • Page 886 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Section 10.11, Intelligent function module setting (interrupt pointer setting) 100A Section 9.1.2(2) Section 9.1.1(2), Module synchronization 100C Section 9.1.2(2) Section 9.1.2(2), A-PLC 100D Section 10.3.2, Section 10.3.3 Use serial communication Transmission speed Section 6.24, Sum check...
  • Page 887 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Section 9.1.1(5), Section 9.1.2(5), Device points 2000 Section 10.1, Section 10.2 Section 3.7, Latch (1) start/end 2001 Section 6.3, Section 9.1.1(5), Latch (2) start/end 2002 Section 9.1.2(5) Section 10.14.2, Local device start/end 2003 Section 9.1.2(5) Section 3.2,...
  • Page 888 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Section 6.2 Constant scanning 3003 Section 9.1.1(4) Section 9.1.2(4) Section 6.18 Breakdown history 3005 Section 9.1.2(4) Section 3.3.3 Low speed program execution time 3006 Section 9.1.2(4) 2000 Device point File register extended Section 9.1.2(6), 2004 Latch (1) start/end...
  • Page 889 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Program 7000 Section 3.3.6 Section 5.1.5, Clear program memory Section 5.2.8, Boot option Auto Download all Data from Memory card to 7000 Section 5.2.9, Standard ROM Section 9.1.1(6), Boot file setting Section 9.1.2(8) SFC program start mode 8002...
  • Page 890 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Number of CC-Link C000 Remote input (RX) Remote output (RY) Remote register (RWr) Remote register (RWw) Ver. 2 remote input (RX) CNM1 Ver. 2 remote output (RY) Ver. 2 remote register (RWr) Ver.
  • Page 891 APPENDICES TableApp.39 List of parameter No. Item Parameter No. Referance Start mode setting Section 9.2(1), Standby system watch setting D001 QnPRHCPU User’s Manual Debug mode setting (Redundant System) Backup mode setting Tracking characteristics settings D002 Tracking device settings Signal flow memory tracking setting Section 9.2(2), Device detail settings Refer to [5.5.3 Tracking data]...

  • Page 892: Appendix 4 Functions Added Or Changed Due To Version Upgrade

    (1) Specification comparison TableApp.40 Specification comparison First 5 digits of serial No. of CPU Module Specifications Function Version A Function Version B "04121" or earlier "04122" or later Q00JCPU Standard RAM capacity Q00CPU 64k bytes 128k bytes Q01CPU 64k bytes 128k bytes...
  • Page 893 *1 : When the CPU instruction installed by GX Developer Version 8 is read by GX Developer of Version 7 or earlier, it is processed as an "instruction code error" by GX Developer. *2 : Unsupported by the Q00JCPU. Appendix 4 Functions Added or Changed Due to Version Upgrade - 104 Appendix 4.1 Basic model QCPU Upgrade...
  • Page 894 APPENDICES (3) Differences among Basic model QCPU models TableApp.42 Differences among Basic model QCPU models Item Q00JCPU Q00CPU Q01CPU CPU module, Power supply module, Main CPU module Stand-alone CPU module base unit (5 slots) Integrated type Main base unit/slim type main base unit...

  • Page 895: Appendix 4.2 High Performance Model Qcpu Upgrade

    APPENDICES Appendix 4.2 High Performance model QCPU Upgrade (1) Specification comparison TableApp.43 Specification comparison First 5 digits of Serial No. of CPU Module Function Version A Function Version B Specifications 02091 or “02112” or 02092 or later 03051 or later 04012 or later earlier later...
  • Page 896 APPENDICES (2) Additional functions and availability of the functions according to the version of GX Developer TableApp.44 Additional functions and availability of the functions according to the version of GX Developer Compatible Compatible serial Compatible GX New Function function version Developer Automatic write to standard ROM ( Section 5.2.8)
  • Page 897 APPENDICES TableApp.44 Additional functions and availability of the functions according to the version of GX Developer Compatible Compatible Compatible New Function function version serial No. GX Developer Selection of trailing edge instruction execution/non- Version 8.27D or 07092 or later later execution at online change( Section 6.12.3) Block guarantee function of CC-Link cyclic data per...

  • Page 898: Appendix 4.3 Process Cpu Upgreade

    APPENDICES Appendix 4.3 Process CPU Upgreade (1) Additional functions and availability of the functions according to the version of GX Developer TableApp.45 Additional functions and availability of the functions according to the version of GX Developer Compatible Compatible serial Compatible GX New Function function version Developer...

  • Page 899: Appendix 4.4 Redundant Cpu Upgrade

    APPENDICES Appendix 4.4 Redundant CPU Upgrade (1) Additional functions and availability of the functions according to the version of GX Developer TableApp.46 Additional functions and availability of the functions according to the version of GX Developer Compatible Compatible Compatible New Function function version serial No.

  • Page 900: Appendix 4.5 Universal Model Qcpu Upgrade

    APPENDICES Appendix 4.5 Universal model QCPU Upgrade (1) Additional functions and availability of the functions according to the version of GX Developer TableApp.47 Additional functions and availability of the functions according to the version of GX Developer Compatible Compatible serial Compatible GX New Function function version...

  • Page 901: Appendix 5 Method Of Replacing High Performance Model Qcpu With Universal Model Qcpu

    APPENDICES Appendix 5 Method of replacing High Performance model QCPU with Universal model QCPU Appendix 5.1 PRECAUTIONS FOR REPLACEMENT This chapter describes the precautions for replacing the High Performance model QCPU with the Universal model QCPU and the replacement methods. (1) System configuration TableApp.48 Precautions for replacement and replacement methods (System configuration) Item...
  • Page 902 APPENDICES (2) Program TableApp.49 Precautions for replacement and replacement methods (Program) Item Precautions Replacement method Reference Replace the instructions not supported in Language and Some instructions are not supported. the Universal model QCPU are described Appendix 5.3 instruction in Appendix 5.3. Instructions for floating-point double- precision operation are added for the The Universal model QCPU operates...
  • Page 903 APPENDICES TableApp.46 Precautions for replacement and replacement methods (Program) (Continued) Item Precautions Replacement method Reference Section 6.5.1 in the When the SCJ instruction is used in the Insert the AND SM400 (or NOP "QCPU(Q Mode)/ Universal model QCPU, the AND SM400 instruction) immediately before the SCJ SCJ instruction QnACPU Programming...
  • Page 904 APPENDICES (3) Drive and file TableApp.50 Precautions for replacement and replacement methods (Drive and file) Item Precautions Replacement method Reference Since the Universal model QCPU retains the data in the program memory even the Files in the standard ROM cannot be battery voltage drops, the boot file setting booted to the program memory.
  • Page 905 APPENDICES (6) Debugging TableApp.53 Precautions for replacement and replacement methods (Debugging) Item Precautions Replacement method Reference Use the sampling trace function for checking device data whose monitoring condition is specified.With this function, changes of the specified device data can be recorded at the following timings: Section 6.11.1 and The monitoring condition cannot be set.
  • Page 906 APPENDICES (7) CPU front switch TableApp.54 Precautions for replacement and replacement methods (CPU front switch) Item Precautions Replacement method Reference The RESET/STOP/RUN switch of the Section 4.4 in the Universal model QCPU can be used for "QCPU User's Manual The operation method with the RESET/RUN/ the reset operation of the CPU module (Hardware Design, STOP switch is modified.
  • Page 907 APPENDICES (8) SFC TableApp.55 Precautions for replacement and replacement methods (SFC) Item Precautions Replacement method Reference Section 4.6 and Change the program as described in Appendix 3.1 in the Step transition The step transition monitoring timer is not Appendix 3.1 in the manual in the "QCPU (Q Mode)/ monitoring timer supported.

  • Page 908: Appendix 5.2 Applicable Devices And Software

    APPENDICES Appendix 5.2 APPLICABLE DEVICES AND SOFTWARE (1) Devices need to be replaced for the compatibility with the Universal model QCPU The following tables show devices need to be replaced for the compatibility with the Universal model QCPU. (As for devices not listed in the tables below, replacement is not required.) TableApp.56 Devices need to be replaced (Communication module) Universal model QCPU-compatible version...
  • Page 909 APPENDICES TableApp.59 Devices need to be replaced (Network module and serial communication module) Universal model QCPU-compatible module version Used with Q02UCPU, Product Model Used with Q13UDHCPU or Used with Built-in Ethernet Q03UDCPU, Q04UDHCPU or Q26UDCPU port QCPU Q06UDCPU • QJ71LP21-25 MELSECNET/H •...
  • Page 910 APPENDICES (2) CPU modules that can configure a multiple CPU system with the Universal model QCPU CPU modules that can configure a multiple CPU system with the Universal model QCPU are shown below. (a) CPU modules that can configure a multiple CPU system with the Universal model QCPU (except Q02UCPU) TableApp.60 CPU modules that can comfiture a multiple CPU system with the Universal model QCPU (except Q02UCPU) Applicable version...
  • Page 911 APPENDICES (3) Software need to be upgraded for the compatibility with the Universal model QCPU The following table shows software need to be upgraded for the communication with the Universal model QCPU. (As for software not listed in the table below, version upgrade is not required.) The latest version can be downloaded from the MELFANSweb.

  • Page 912: Appendix 5.3 Instructions

    APPENDICES Appendix 5.3 INSTRUCTIONS Appendix 5.3.1 Instructions not Supported in Universal Model QCPU and Alternative Methods The Universal model QCPU does not support instructions listed in the TableApp.64 and TableApp.65. Instructions need to be replaced using alternative methods described in the tables.
  • Page 913 APPENDICES TableApp.65 SFC control instructions not supported in the Universal model QCPU and alternative methods Symbol Instruction Alternative method LD TRn AND TRn OR TRn LDI TRn ANDI TRn ORI TRn Forced transition check When the programmable controller type is changed, these instructions are instruction converted into SM1255.Modify programs as needed.

  • Page 914: Appendix 5.3.2 Replacing Programs Using Multiple Cpu Transmission Dedicated Instructions

    APPENDICES Appendix 5.3.2 Replacing Programs Using Multiple CPU Transmission Dedicated Instructions (1) Replacing the High Performance model QCPU with the Universal model QCPU (except Q02UCPU) TableApp.66 shows instructions need to be replaced and corresponding alternative instructions. For the specifications of each instruction, refer to the manuals of Motion CPU.

  • Page 915: Appendix 5.3.3 Program Replacement Examples

    APPENDICES Appendix 5.3.3 Program Replacement Examples This section shows program replacement examples for the instructions of which replacement programs are available in Appendix 5.3. (If instructions listed in Appendix 5.3 are not used in the program, it is not necessary to be conscious of the description in this section.) (1) Replacement example of the IX and IXEND instructions A replacement example of program using the IX and IXEND instructions is shown...
  • Page 916 APPENDICES (c) Program after replacement • Replace the IX instruction with the ZPUSH instruction and the processing for setting the contents of index modification table to index registers. • Replace the IXEND instruction with the ZPOP instruction. Current index register is saved.
  • Page 917 APPENDICES (2) Replacement example of the IXDEV and IXSET instructions A replacement example of program using the IXDEV and IXSET instructions is shown below. Change the program so that the device offset value specified by the contacts between the IXDEV and the IXSET instructions are directly set to the index modification table using the MOV instruction.
  • Page 918 APPENDICES (a) Program before replacement The device offset values for input (X), output (Y), internal relay (M), data register (D), link register (W), and pointer (P) are set to the index modification table starting from D0. Figure App.4 Sample program (b) Program after replacement The device offset values specified by the IXDEV and IXSET...
  • Page 919 APPENDICES (3) Replacement example of the PR instruction A replacement example of program using the PR instruction is shown below. The number of output characters can be switched by the ON/OFF status of SM701. (a) Example of device assignment TableApp.68 Example of device assignment Before replacement After replacement Application...
  • Page 920 APPENDICES (c) Program after replacement In the sequence program after replacement, three programs are required as shown below. A sample program can be downloaded from the MELFANSweb. <Before transition> <After transition> Main routine Main routine program program Output strings and output string storage address are set. FEND Subroutine program...
  • Page 921 APPENDICES 2) Subroutine program • In the subroutine program, the data for outputting ASCII codes using a fixed scan interrupt program (10ms) are set to work devices. Also, the flag for activating the processing in the fixed scan interrupt program is turned •...
  • Page 922 APPENDICES 3) Interrupt program The following processing is added to a fixed scan interrupt program (10ms). The fixed scan interrupt program outputs ASCII codes from the output module and controls the strobe signal. The following signals are all turned OFF when all strings are output.
  • Page 923 APPENDICES (4) Replacement example of the CHKST and CHK instructions A replacement example of program using the CHKST and CHK instructions is shown below. In the example below, if the replacement program for the CHKST and CHK instructions detects a failure, a failure number (contact number + coil number) is stored in D200 and the annunciator F200 is turned ON.
  • Page 924 APPENDICES (b) Program before replacement Figure App.11 Sample program (c) Program after replacement In the sequence program after replacement, two programs are required as shown below. <Before transition> <After transition> Main routine Main routine program program Initial processing FEND Subroutine program An failure status is checked, and if a failure is detected, a failure number is stored in D200.
  • Page 925 APPENDICES 2) Subroutine program • In the subroutine program, an failure status is checked using a failure detection ladder pattern. If a failure is detected, a failure number is stored in D200 and the annunciator F200 is turned ON. • Specify the following arguments for the subroutine program. First argument Device number of X device targeted for failure check (Input)
  • Page 926 APPENDICES (5) Replacement example of the KEY instruction A replacement example of program using the KEY instruction is shown below. (a) Example of device assignment TableApp.70 Example of device assignment Before replacement After replacement Application Device Application Device Numeric input execution Numeric input execution instruction instruction...
  • Page 927 APPENDICES (c) Program after replacement In the sequence program after replacement, two programs are required as shown below. A sample program can be downloaded from the MELFANSweb. <Before transition> <After transition> Main routine Main routine program program Initial processing FEND Subroutine program ASCII code is added to the input data area.
  • Page 928 APPENDICES 2) Subroutine program • In the subroutine program, ASCII codes specified by an argument are added to the input data area and the completion status is checked. • Specify the following arguments for the subroutine program. First argument ASCII code input from the input module (K2Xn) (Input) Second argument Number of digits to be input...

  • Page 929: Appendix 5.4 Functions

    APPENDICES Appendix 5.4 FUNCTIONS Appendix 5.4.1 Floating-point Operation Instructions (1) Differences between High Performance model QCPU and Universal model QCPU (a) High Performance model QCPU The High Performance model QCPU can perform only the single-precision floating-point operation instructions. Note, however, that internal operation processing can be performed in double precision by checking the item on the PLC system setting tab of PLC parameter as shown below.
  • Page 930 APPENDICES (2) Floating-point operation instructions for the Universal model QCPU TableApp.71 lists floating-point operation instructions for the Universal model QCPU. Specifications of the single-precision floating-point operation instructions are compatible with those for the High Performance model QCPU. TableApp.71 List of floating-point operation instructions supported in the Universal model QCPU Instruction symbol Instruction name Remarks...
  • Page 931 APPENDICES (3) Advantages and disadvantages when using the double-precision floating-point data of the Universal model QCPU TableApp.73 shows the advantages and disadvantages when performing the double- precision floating-point operation instructions in the Universal model QCPU. If higher accuracy is required in floating-point operations, it is recommended to replace the instructions with the double-precision floating-point operation instructions.
  • Page 932 APPENDICES (4) Method of replacing High Performance model QCPU with Universal model QCPU (a) Replacing all single-precision floating-point operation instructions with double-precision floating-point operation instructions Single-precision floating-point data occupy two points of word device per data. On the other hand, four points are required per double-precision floating-point data. Therefore, all device numbers for storing floating-point data need to be reassigned.
  • Page 933 APPENDICES (b) Replacing a part of floating-point operation instructions with double- precision floating-point operation instructions Only operations require high accuracy are replaced with double-precision floating- point operation instructions. Using the ECON and EDCON instructions, convert floating-point data mutually between single precision and double-precision. The flow of a replacement program is as follows: •...
  • Page 934 APPENDICES 3) Program after replacement Floating-point data are converted from single precision to double precision. Operation is performed using double-precision floating-point data. The floating-point operation result data are converted from double precision to singe precision. Figure App.23 Sample program - 145 Appendix 5 Method of replacing High Performance model QCPU with Universal model QCPU...
  • Page 935 APPENDICES (c) Replacing a part of floating-point operation instructions with double- precision floating-point operation instructions using subroutine programs The flow of a replacement program described in (b) can be regarded as one subroutine program. Create subroutine programs for each floating-point operation instruction and then replace the original floating-point operation instructions with the CALL(P) instructions so that subroutine programs are called.
  • Page 936 APPENDICES 3) Program after replacement A subroutine program for multiplication using the double-precision floating-point operation instruction A subroutine program for addition using the double-precision floating-point operation instruction Figure App.25 Sample program - 147 Appendix 5 Method of replacing High Performance model QCPU with Universal model QCPU...

  • Page 937: Appendix 5.4.2 Error Check Processing For Floating-Point Data Comparison Instructions

    APPENDICES Appendix 5.4.2 Error Check Processing for Floating-point Data Comparison Instructions (1) Input data check An error check processing for floating-point data comparison instructions performed in the Universal model QCPU are enhanced. Input of a "special value" (-0, nonnumeric, unnormalized number, and ) is checked, and if those special values are input, an OPERATION ERROR (error code: 4140) is detected.
  • Page 938 APPENDICES Example 2) Not detecting an OPERATION ERROR (error code: 4140) in the ANDE instruction [Ladder mode] [List mode] In the ladder block starting from the step 104, the ANDE<= instruction of the step 105 shall not be executed when the M101 (valid data flag) is OFF. The ANDE<= instruction of the step 105 is not executed when the M101 is OFF in the LD instruction of the step 104 in the program above.
  • Page 939 APPENDICES (2) Method of avoiding an occurrence of OPERATION ERROR (error code: 4140) in the floating-point data comparison instructions As shown in the modification examples below, connect the contacts of valid data flag in series for each floating-point data comparison instruction. (Use AND connection for connecting the contact of the valid data flag and the floating-point data comparison instruction.) Make sure that there is no line (OR connection) between the valid data flag and the...
  • Page 940 APPENDICES Program examples after modification for Example 1) and 3) in (1) are shown below. Example 4) Program after modification for Example 1) (An OPERATION ERROR (error code: 4140) is no longer detected.) [Ladder mode] [List mode] Example 5) Program after modification for Example 3) (An OPERATION ERROR (error code: 4140) is no longer detected.) [Ladder mode] [List mode]...

  • Page 941: Appendix 5.4.3 Device Latch Function

    APPENDICES Appendix 5.4.3 Device Latch Function (1) Overview This section explains how to use the latch function *1 of the Universal model QCPU, which has been enhanced compared with the High Performance model QCPU. * 1: The latch function is a function that allows device data retention even if power is turned OFF or the CPU module is reset.
  • Page 942 APPENDICES (c) Specifying internal user device as latch ranges In the same way as for the High Performance model QCPU, latching is available by specifying internal user devices as latch ranges for the Universal model QCPU. The ranges can be set on the Device setting tab of PLC parameter. Internal user devices that can be latched are as follows: •...

  • Page 943: Appendix 5.4.4 File Usability Setting

    APPENDICES Appendix 5.4.4 File Usability Setting (1) Differences between High Performance model QCPU and Universal model QCPU (a) High Performance model QCPU In the High Performance model QCPU, file usability for each program can be set to either "Use PLC file setting" or "Not used" on the screen displayed by clicking the "File usability setting"...
  • Page 944 APPENDICES (2) Method of replacing High Performance model QCPU with Universal model QCPU (a) When file usability is set for file register, device initial value, and/or comment Replacement method depends on the contents on the PLC file setting tab of PLC parameter.

  • Page 945: Appendix 5.4.5 Parameter-Valid Drive And Boot File Setting

    APPENDICES Appendix 5.4.5 Parameter-valid Drive and Boot File Setting (1) Differences between High Performance model QCPU and Universal model QCPU (a) High Performance model QCPU The parameter-valid drive is specified at the switches on the front panel of the High Performance model QCPU. (b) Universal model QCPU The Universal model QCPU automatically determines the parameter-valid drive, depending on the existence of parameters in the drive (program memory, memory...
  • Page 946 APPENDICES (2) Method of replacing High Performance model QCPU with Universal model QCPU (a) When the parameter-valid drive is set to the standard ROM in the High Performance model QCPU TableApp.81 When the parameter-valid drive is set to the standard ROM Setting in High Performance model QCPU Setting in Universal model QCPU Boot file setting of PLC parameter...
  • Page 947 APPENDICES TableApp.77 When the parameter-valid drive is set to the standard ROM(Continue) Setting in High Performance model QCPU Setting in Universal model QCPU Boot file setting of PLC parameter Contents of boot file setting Type Transfer from Transfer to (Data other Delete all settings for data other than program and parameter in the boot file than program Memory card...
  • Page 948 APPENDICES (b) When the the parameter-valid drive is set to the memory card (RAM) or memory card (ROM) in the High Performance model QCPU TableApp.82 When the parameter-valid drive is set to the memory card (RAM) or memory card (ROM) Setting in High Performance model QCPU Setting in Universal model QCPU Boot file setting of PLC parameter...
  • Page 949 APPENDICES TableApp.78 When the parameter-valid drive is set to the memory card (RAM) or memory card (ROM)(Continue) Setting in High Performance model QCPU Setting in Universal model QCPU Boot file setting of PLC parameter Contents of boot file setting Type Transfer from Transfer to (Data other...

  • Page 950: Appendix 5.4.6 Forced On/Off Function Of External I/O

    APPENDICES Appendix 5.4.6 Forced ON/OFF Function of External I/O (1) Differences between High Performance model QCPU and Universal model QCPU (a) High Performance model QCPU External I/O can be forcibly turned ON/OFF on the screen displayed by selecting [Online] [Debug] [Forced input output registration/cancellation] using GX Developer in the High Performance model QCPU.
  • Page 951 APPENDICES Example) Forcibly turning X40, X77, and X7A ON, and X41 and Y7B OFF The programs, "SETX" and "SETY", turns ON or OFF the X and Y devices, which have been registered for forced ON/OFF using the forced ON/OFF function of external I/O, at each scan using the SET and RST instructions.
  • Page 952 APPENDICES (3) Replacing the COM instruction If the COM instruction is used, add subroutine calls for P10 and P11 before and after the COM instruction. (P10 and P11 are pointers shown in the program examples in (2).) When SM775 is ON (Executes refresh set by SD778) and also the 0 bit of SD778 is OFF (Do not execute I/O refresh), replacement of the instruction is not necessary.
  • Page 953 APPENDICES (4) Replacing the RFS instruction If any I/O numbers targeted for forced ON/OFF are included in the partial refresh range specified by the RFS instruction, add subroutine calls for P10 and P11 before and after the RFS instruction. (P10 and P11 are pointers shown in the program examples in (2).) If no I/O number targeted for forced ON/OFF is included, addition of subroutine calls for P10 and P11 is not necessary.

  • Page 954: Appendix 5.5 Special Relays And Special Registers

    APPENDICES Appendix 5.5 SPECIAL RELAYS AND SPECIAL REGISTERS The Universal model QCPU does not support the special relays and special registers described in Appendix 5.5 and Appendix 5.5. Replace them using the method described in the table or delete the corresponding parts. Appendix 5.5.1 Special Relay List TableApp.84 lists special relays not supported in the Universal model QCPU and measures to be taken.
  • Page 955 APPENDICES TableApp.80 Special relays not supported in the Universal model QCPU and measures to be taken(Continue) Number Name/Description Measures to be taken Replace the relay with the I/O signals (Xn0, Xn1, XnF) of SM280 CC-Link error the mounted CC-Link module. The Universal model QCPU does not support low-speed SM330 Operation mode for low-speed execution type program...

  • Page 956: Appendix 5.5.2 Special Register List

    APPENDICES Appendix 5.5.2 Special Register List TableApp.85 lists special registers not supported in the Universal model QCPU and measures to be taken. TableApp.85 Special registers not supported in the Universal model QCPU and measures to be taken Number Name/Description Measures to be taken The Universal model QCPU does not support the CHK instruction.For the alternative SD80 CHK number...
  • Page 957 APPENDICES TableApp.81 Special registers not supported in the Universal model QCPU and measures to be taken(Continue) Number Name/Description Measures to be taken Program No. specification for PLAODP The Universal model QCPU does not support the PLAODP instruction.Delete the SD720 instruction corresponding part.
  • Page 958 APPENDICES Appendix 6 Specifications Comparison Between Ethernet Port of Built-in Ethernet Port QCPU and Ethernet Module TableApp.86 shows the specifications comparison between the Ethernet port of the Built-in Ethernet port QCPU (QnUDE(H)CPU) and the Ethernet module (QJ71E71-100). TableApp.86 Specifications Comparison between Built-in Ethernet port QCPU and Ethernet module Availability Item Description...
  • Page 959 APPENDICES TableApp.86 Specifications Comparison between Built-in Ethernet port QCPU and Ethernet module (Continued) Availability Item Description QnUDE(H)CPU QJ71E71-100 Checks the connection status of an external device by Check with Ping ("Use sending a Ping message (ICMP Echo) to an external the Ping") device.
  • Page 960 APPENDICES * 1 : Available commands are restricted. ( Section 7.4) * 2 : The "quote cpuchg" command is not supported. ( Section 7.6) * 3 : Only a default router can be specified. * 4 : Settings are fixed to the following: Interval timer: 5 seconds, Resend timer: 8 times. * 5 : Up to 16 MELSOFT products can be connected by setting "MELSOFT connection"...

  • Page 961: Appendix 7 Access Range Using Ethernet Port Of Built-In Ethernet Port Qcpu

    APPENDICES Appendix 7 Access Range Using Ethernet Port of Built-in Ethernet Port QCPU The following figure shows the access range and the access availability of GX Developer and GOT when the Ethernet port of the Built-in Ethernet port QCPU is used. Serial CC-Link CC-Link...
  • Page 962 APPENDICES TableApp.87 Access availability Access target Access source GX Developer A0 GOT A0 GX Developer A'0 GX Developer A''0 GX Developer A'''0 GX Developer B0 GX Developer A1 GOT A1 GX Developer A'1 GX Developer B1 GX Developer A''1 GX Developer A3 GX Developer B3 G4 A3 GOT A3...

  • Page 963: Appendix 8 Precautions For Battery Transport

    (2) Transport guidelines Comply with IATA Dangerous Goods Regulations, IMDG code and the local transport regulations when transporting products after unpacking or repacking, while Mitsubishi ships products with packages to comply with the transport regulations. Also, contact the transporters.

  • Page 964: Appendix 9 Device Point Assignment Sheet

    APPENDICES Appendix 9 Device Point Assignment Sheet (1) For Basic model QCPU TableApp.89 Device Point Assignmene Sheet (For Basic model QCPU) *1*2 Restriction check Number of device points Numeric Device name Symbol Number of bit notation Number of points Number Capacity (Word) points Input relay...
  • Page 965 APPENDICES (2) For High Performance model QCPU, Process CPU, Redundant CPU TableApp.90 Device Point Assignmene sheet (For High Performance model QCPU, Process CPU, Redundant CPU) *1*2 Restriction check Number of device points Numeric Device name Symbol Number of bit Capacity ( words) notation Number of points Number...
  • Page 966 APPENDICES (3) For Universal model QCPU TableApp.91 Device Point Assignmene sheet (For Universal model QCPU) *1*2 Restriction check Number of device points Numeric Device name Symbol Number of bit Capacity ( words) notation Number of points Number points Input relay 8k (8192)points X0000 to 1FFF 512 words...
  • Page 967 INDEX [0] to [9] Communication by FROM/TO instruction ..8-6 Communication using built-in Ethernet ports of CPU 5VDC internal current consumption module ........7-1 .
  • Page 968 Direct access output (DY)....3-76 FTP ........7-23 Direct connection .
  • Page 969 Intelligent function module setting ..9-3,9-15 Low speed END processing ....3-40 Internal current consumption . .2-3,2-7,2-11,2-15,2-19 Low speed execution type program.
  • Page 970 PLC name setting ..... 9-2,9-14 Redundant power main base unit ... . A-38 PLC parameters .
  • Page 971 Subroutine programs ..... . . 3-9 X/Y assignment check ....9-12,9-28 SW (Link special register) .
  • Page 972 Memo Index...
  • Page 973 6. Failure caused by reasons unpredictable by scientific technology standards at time of shipment from Mitsubishi. 7. Any other failure found not to be the responsibility of Mitsubishi or that admitted not to be so by the user. 2. Onerous repair term after discontinuation of production (1) Mitsubishi shall accept onerous product repairs for seven (7) years after production of the product is discontinued.
  • Page 974 Microsoft, Windows, Windows NT, Windows Vista are registered trademarks of Microsoft Corporation in the United States and other countries. Pentium and Celeron are trademarks of Intel Corporation in the United States and other countries. Ethernet is a trademark of Xerox Co., Ltd. in the United States. CompactFlash is a trademark of SanDisk Corporation.

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