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Figure 15-2. A/D Converter Mode Register Format
<7>
<6>
5
Symbol
CS
TRG
FR1
ADM
ADM3
ADM2
ADM1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
A/D Conversion Time Selection
FR1
FR0
HSC
f
MCS = 1
0
0
1
80/f
0
1
1
40/f
1
0
0
50/f
1
0
1
100/f
Other combinations
Setting prohibited
TRG
External Trigger Selection
0
No external trigger (software starts)
1
Conversion started by external trigger (hardware starts)
CS
A/D Conversion Operation Control
0
Operation stop
1
Operation start
Notes 1. Set so that the A/D conversion time is 19.1 s or more.
2. Setting prohibited because A/D conversion time is less than 19.1 s.
Cautions 1. The following sequence is recommended for power consumption reduction of A/D
converter when the standby function is used: Clear bit 7 (CS) to 0 first to stop the A/
D conversion operation, and then execute the HALT or STOP instruction.
2. When restarting the stopped A/D conversion operation, start the A/D conversion
operation after clearing the interrupt request flag (ADIF) to 0.
Remarks 1. f
X
2. MCS : Bit 0 of oscillation mode selection register (OSMS)
CHAPTER 15 A/D CONVERTER
4
3
2
1
0
FR0
ADM3
ADM2 ADM1 HSC
Analog Input Channel Selection
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
Note 1
= 5.0-MHz Operation
X
MCS = 0
Note 2
(Setting prohibited
)
160/f
X
X
Note 2
(Setting prohibited
)
80/f
(Setting prohibited
X
X
Note 2
(Setting prohibited
)
100/f
X
X
(20.0 s)
200/f
µ
X
X
: Main system clock oscillation frequency
After
Address
Reset
FF80H
01H
f
= 4.19-MHz Operation
X
MCS = 1
(32.0 s)
80/f
(19.1 s)
µ
µ
X
Note 2
)
40/f
(Setting prohibited
X
(20.0 s)
50/f
(Setting prohibited
µ
X
(40.0 s)
100/f
(23.8 s)
µ
X
R/W
R/W
MCS = 0
160/f
(38.1 s)
µ
X
Note 2
)
80/f
(19.1 s)
µ
X
Note 2
)
100/f
(23.8 s)
µ
X
200/f
(47.7 s)
µ
µ
X
297
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