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Port mode register group A
Address
7
6
FE8H
PM63
PM62
Port mode register group C
Address
7
6
FEEH
–
–
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
Figure 6-10. Format of Each Port Mode Register
Specification
0
Input mode (output buffer off)
1
Output mode (output buffer on)
5
4
3
2
PM61
PM60
PM33 PM32
5
4
3
2
–
–
–
–
User's Manual U10676EJ3V0UM
1
0
Symbol
PM31
PM30
PMGA
Sets P30 to input or output mode
Sets P31 to input or output mode
Sets P32 to input or output mode
Sets P33 to input or output mode
Sets P60 to input or output mode
Sets P61 to input or output mode
Sets P62 to input or output mode
Sets P63 to input or output mode
1
0
Symbol
–
PM8
PMGC
Sets port 8 (P80) to input or output mode
95
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