Chipset Overview; Mch (North Bridge); I/O Controller Hub-Esb2 (South Bridge) - Silicon Graphics Altix XE250 User Manual

Chipset Overview

MCH (North Bridge)

I/O Controller Hub-ESB2 (South Bridge)

007-5467-001
Built upon the functionality and the capability of the 5400 chipset, the SGI Altix XE250 node
board provides the performance and feature set required for quad-processor or
dual-processor-based high-end systems with configuration options optimized for complex storage
platforms. The 5400 chipset supports single or dual Intel Quad-Core/Dual-Core Xeon 5200 or
5400 series processors with front side bus speeds of up to 1.6 GHz. The chipset consists of the
5400 Memory Controller Hub (MCH) for the host bridge and the 631xESB/632xESB I/O
Controller Hub (Enterprise South Bridge 2-ESB2) for the I/O subsystem.
The 5400 MCH (North Bridge) provides two FSB processing interfaces, four fully buffered (FBD)
DIMM memory channels, PCI-Express bus interfaces configurable to form x8 or x16 ports, an
EB2 South Bridge Interface (ESI) and SMBus Interfaces for system management, and DIMM
Serial Presence Detect (SPD). The peak bandwidth for each FBD channel is 8 GB/s for DDR2
800/667 FBD memory, giving a total memory size of 128 MB for 4 FBD channels. The
PCI-Express interfaces can be configured to form x8 or x16 ports that can operate up to generation
2 speeds in x16 configuration for enhanced graphics applications.
The 631xESB/632xESB I/O Controller Hub (Enterprise South Bridge 2) integrates an Ultra ATA
100 Controller, six Serial ATA host controller ports, one EHCI host controller, six external USB
2.0 ports, an LPC interface controller, and a flash BIOS interface controller. Additionally, the ESB
2 chip also contains a PCI interface controller, Azalia 97 codec digital controller, integrated LAN
controller, an ASF controller and an ESI for communication with the MCH. The Intel ESB2 offers
the data buffering and interface arbitration capabilities.
Compliant with the ACPI platform, the ESB2 supports the Full-On, Stop-Grant,
Suspend-to-RAM, Suspend-to-Disk, and Soft-Off power management states. Combined with the
functionality offered by the onboard LAN controller, the ESB2 also supports alert systems for
remote management.
Chipset Overview
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