HP 64751 User Manual page 234

Graphical user interface
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Chapter 7: Using the Emulation Analyzer
Qualifying Trigger and Store Conditions
Trace
Signal
Signals
Name
0-31
A0-A31
32-47
D0-D15
64
BKG_L
65
FC0
66
FC1
FC2
67
68
R/*W
69
SIZ0
70
SIZ1
71
CS_BYTE_L
72
DS0_L
73
DS1_L
74
BERR_L
75
HALT_L
76
CODE_L
77
FLUSH_L
78
FC3
79
CS0_L
234
Emulation Analyzer Trace Signals
Signal
Description
Address Lines 0-31.
Data Lines 0-15.
Background Debug Mode (BDM) active. This signal is used to qualify
the analyzer clock for tracing only foreground or only background cycles.
Function Codes 0-2. These lines to the analyzer are derived from the
68340 processor's function code lines. The function code meanings are:
001 - User Data Space
010 - User Program Space
101 - Supervisor Data Space
110 - Supervisor Program Space
111 - CPU Space
Read/write signal.
Number of bytes remaining to be transferred.
Chip select byte/word signal.
Data size acknowledge. Note that the 68340 SIM can be programmed to
internally generate the DSACKx signals for external accesses; in this
case, the DSACKx values do not show up on these trace signals.
Bus error active.
Halt active.
Instruction execution active.
Instruction pipeline flush active.
Function code 3. This can be set by the 68340 DMA controller for
DMA transfers; however
Chip select 0 active.

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