Interface To External Usb Transceiver (Non-Otg) - Intel PXA27 Series Design Manual

'USB Client Controller
12.4.7

Interface to External USB Transceiver (non-OTG)

In addition to the OTG interfaces to external transceiver and charge pump devices, the UDC and
USB host controller interfaces to a non-OTG external USB transceiver through the single-ended
interface with the GPIOs. In this mode, the GPIOs provide unidirectional connections to an
external transceiver and the external transceiver provides bidirectional connections for D+ and D-
to the USB. This mode is selected when Single-Ended Zero (SEO) in the
Control Register (UP2OCR)"
processor connection to an external USB transceiver.
Figure 12-9. PXA27x Processor Connection to External USB Transceiver
1
USB Host
2
Controller
3
Transmit enable
USB Device
Controller
D +/D -
UP2OCR[EXSP]
Transmit enable
UP2OCR[SE0S]
PXA27x Processor
II:12-12
is set to 2 or 3. See Figure 12-9
USB_P2_4
USB_P2_6
USB_P2_7
USB_P2_2
USB_P2_1
USB_P2_5
USB_P2_3
®
Intel PXA27x Processor Family Design Guide
"USB Port 2 Output
for illustration of the PXA27x
VMO
VPO
SPEED
OE_n
RCV
VP
VM
External USB
Transceiver
D -
D +