Block Diagram/Schematic; Layout Notes - Intel PXA27 Series Design Manual

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24.3

Block Diagram/Schematic

For many uses, especially slow switching or static applications, the GPIOs are directly connected
to the corresponding signal of the peripheral. Buffers and terminating resistors are not required.
24.4

Layout Notes

The GPIOs are not fast-switching devices and do not switch any faster than 10 MHz. This allows
greater flexibility in the design and layout of the GPIO signals on the PCB. Guidelines and
techniques, similar to those used with the GPIOs of the Intel
are applicable for the PXA27x processor.
The 10 MHz maximum switching frequency only applies to the GPIO pins when configured as
GPIOs. When configured with an alternate function, the maximum switching speed exceeds
10 MHz, depending upon the alternate function in use. Refer to the appropriate section in the Intel
PXA27x Processor Developers Manual for more information on the maximum switching speed for
GPIOs when configured with an alternate function.
Be certain not to run any GPIO signals, especially reset and interrupt related signals, in close
proximity to clock or address/data lines. The higher frequency of these signals results in spurious
transitions on the GPIO signals that causes extraneous resets or interrupts. Separate these signals
both spatially on the layer as well as between layers to avoid this problem.
®
Intel
PXA27x Processor Family Design Guide
General Purpose Input/Output Interfaces
®
PXA250 and PXA210 processors,
§§
®
II:24-3

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