2
I
S Interface
14.5
Modes of Operation Overview
2
The I
S controller has two modes of operation:
•
The PXA27x processor I
CODEC.
•
The external CODEC supplies BITCLK as an input signal to PXA27x processor I
14.5.1
PXA27x Processor Provides BITCLK signal to CODEC
In this mode of operation, the BITCLK signal is an output to the CODEC; SYSCLK must be
configured as an output.
14.5.1.1
Signals
See
Table 14-2
PXA27x processor provides BITCLK to the CODEC.
2
Table 14-2. I
S Controller Interface to CODEC (PXA27x Processor Providing BITCLK to
CODEC)
Name
SYSCLK
BITCLK
SYNC
SDATA_OUT
SDATA_IN
II:14-4
2
S controller supplies the BITCLK as an output signal to the external
for the list of the signals between the I
Direction
System Clock = BITCLK x 4 used by the CODEC only
Output
SYSCLK is driven out of the I
configured as an output
Bit-rate clock = SYNC x 64
Output
SYSCLK must be configured as an output
Left/Right identifier
Output
SYNC is BITCLK divided by 64
Output
Serial audio output data to CODEC
Input
Serial audio input data from CODEC
2
S and an external CODEC device when the
Description
2
S controller only if BITCLK is
®
Intel
PXA27x Processor Family Design Guide
2
S controller.