Signals - Intel PXA27 Series Design Manual

UART Interfaces
10.2

Signals

See Table 10-1
The signals are connected to the PXA27x processor through GPIOs.
Table 10-1. UART Signal Descriptions (Sheet 1 of 2)
Name Direction
SERIAL INPUT – Serial data input to the receive shift register. In infrared mode, it is connected to the infrared
RXD Input
RXD signal. This signal is present on all three UARTs.
SERIAL OUTPUT – Serial data output to the communications link-peripheral, modem, or data set. The TXD
TXD Output signal is set to the logic 1 state upon a Reset operation. It is connected to the TXD signal of the infrared
transmitter in infrared mode. This signal is present in all three UARTs.
CLEAR TO SEND – When low, indicates the modem or data set is ready to exchange data. The nCTS signal
is a modem status input and its condition is tested by reading bit 4 (CTS) of the Modem Status Register
(MSR). Bit 4 is the complement of the nCTS signal. Bit 0 (DCTS) of the MSR indicates whether the nCTS
input has changed state since the last time the MSR was read. nCTS has no effect on the transmitter. This
signal is present on the FFUART and BTUART.
When the CTS bit of the MSR changes state and the Modem Status interrupt is enabled, an interrupt is
generated.
Non-Autoflow Mode: When not in Autoflow mode, bit 4 (CTS) of the MSR indicates the state of nCTS. Bit 4 is
nCTS Input the complement of the nCTS signal. Bit 0 (DCTS) of the MSR indicates whether the nCTS input has changed
state since the previous reading of the MSR. nCTS has no effect on the transmitter. The user programs the
UART to interrupt the processor when DCTS changes state. The programmer then stalls the outgoing data
stream by starving the transmit FIFO, or disabling the UART with the IER register.
NOTE: If UART transmission is stalled by disabling the UART, the user does not receive an MSR interrupt
when nCTS reasserts. This is because disabling the UART also disables interrupts. To get around
this, either use Auto CTS in Autoflow Mode or program the nCTS GPIO pin to interrupt.
Autoflow Mode: In Autoflow mode, the UART Transmit circuity checks the state of nCTS before transmitting
each byte. If nCTS is high, no data is transmitted.
DATA SET READY – When low, indicates the modem or data set is ready to establish a communications link
with a UART. The nDSR signal is a Modem Status input and its condition is tested by reading Bit 5 (DSR) of
the MSR. Bit 5 is the complement of the nDSR signal. Bit 1 (DDSR) of the MSR indicates whether the nDSR
nDSR Input
input has changed state since the MSR was last read. This signal is present only on the FFUART.
When the DSR bit of the MSR changes state, an interrupt is generated if the Modem Status interrupt is
enabled.
DATA CARRIER DETECT – When low, indicates the data carrier has been detected by the modem or data
set. The nDCD signal is a modem status input and its condition is tested by reading Bit 7 (DCD) of the MSR.
Bit 7 is the complement of the nDCD signal. Bit 3 (DDCD) of the MSR indicates whether the nDCD input has
nDCD Input
changed state since the previous reading of the MSR. nDCD has no effect on the receiver. This signal is
present only on the FFUART.
When the DCD bit changes state and the Modem Status interrupt is enabled, an interrupt is generated.
II:10-2
for the list and description of the external signals connected to the UART modules.
Description
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Intel PXA27x Processor Family Design Guide