Layout Notes; Modes Of Operations; Clock Interface - Intel PXA27 Series Design Manual

Clocks and Power Interface
3.4

Layout Notes

Two external power capacitors must be connected to the PXA27x processor PWR_CAPx signals.
The capacitors, C2 and C3, must be populated to achieve power efficiency using the DC-DC
converter.
The sleep mode DC-DC converter requires three external components:
•
C1: 0.1 µF capacitor connected to the PWR_OUT pin and ground (not optional)
•
C2: 0.1 µF capacitor connected between the PWR_CAP0 and PWR_CAP1 pins
•
C3: 0.1 µF capacitor connected between the PWR_CAP2 and PWR_CAP3 pins
The sleep/deep-sleep mode DC-DC converter is enabled by setting the DC_EN bit field in the
Power Manager General Configuration register.
The DC-DC converter is used when all of these conditions apply:
Note: The sequence of setting these conditions is unimportant.
•
The PXA27x processor is in sleep or deep-sleep mode.
•
The PXA27x processor oscillator (13.000 MHz) is disabled.
•
None of the internal SRAM banks, CPU, power island, or peripheral units are in a state-
retaining mode.
•
The power manager I
The capacitors, C2 and C3, must be low equivalent series resistance (ESR), ceramic, unpolarized
capacitors. No other connections are allowed on the PWR_OUT and PWR_CAP<3:0> pins.
3.5

Modes of Operations

This section provides detailed information on different modes of operations for both the clock and
power interface.
3.5.1

Clock Interface

The PXA27x processor requires a 13-MHz timing reference that generates all core and most
peripheral timing. While the real-time clock is operated from the 13-MHz reference to save cost
and space in systems that do require high timekeeping accuracy, most systems use a 32.768-KHz
timing reference. Using a 32.768-KHz timing reference dramatically reduces power consumption
in the standby, sleep, and deep sleep operating modes and provides better accuracy with the real-
time clock.
Both timing references are generated using a crystal with the on-chip oscillator or externally by
clock oscillators. This flexibility eliminates the need for duplicate oscillators in systems that
already use a 13.000-MHz or a 32.768-KHz oscillator. Additionally, when the PXA27x processor
generates either clock using its oscillator, this clock drives the clock inputs of other system
components such as a cellular baseband processor.
II:3-6
2
C, JTAG, and timer are inactive.
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Intel PXA27x Processor Family Design Guide