Sd And Sdio Protocol Block And Schematic Diagrams - Intel PXA27 Series Design Manual

MultiMediaCard/SD/SDIO Card Controller
15.4.2.2

SD and SDIO Protocol Block and Schematic Diagrams

See Figure 15-3
controller and an SD Card or SDIO Card. The block diagram shows high level signal usage and
connectivity when using the SD or SDIO communication protocols with an SD Card or SDIO Card
respectively.
Figure 15-3. SD and SDIO Protocol Interface Block Diagram
II:15-8
for the block diagram showing the interface between the MMC/SD/SDIO Card
PXA27x
Processor
MMC/SD/SDIO
Controller
(SD/SDIO
Protocol)
MMCLK
MMCMD
MMDAT<0>
MMDAT<1>
MMDAT<2>/MMCCS<0>
MMDAT<3>/MMCCS<1>
Clock
Command
Response
Write Data
Read Data
4-bit Write Data
4-bit Read Data
4-bit Write Data
4-bit Read Data
4-bit Write Data
4-bit Read Data
®
Intel PXA27x Processor Family Design Guide
SD/SDIO
Card
CLK
CMD
DAT0
DAT1
DAT2
DAT3
MMC_002_P2