Signals ............................................................................................Ii: - Intel PXA27 Series Design Manual

Thermal Considerations I:2-10
Tray Specifications I:2-11
TRISTATE II:26-6
Types of UARTs II:10-3
U
UART
FIFO mode II:10-1
non-FIFO mode II:10-1
UART Interfaces II:10-1
UARTs
II:D-7, II:E-3
Universal Asynchronous Receiver/Transmitter II:10-1
Universal Serial Bus Device Controller
II:12-1
Universal Serial Bus Host Controller
II:D-10, II:E-5
Universal Serial Bus Host Interface II:20-1
Universal Subscriber ID Interface
II:D-10, II:E-5
Universal Subscriber ID Interfacev II:E-5
Universal Subscriber Identity Module
Card Interface Description II:19-3
Update-DR State II:26-12
Update-IR State II:26-14
USB Client
Signals II:12-1
USB Client Controller II:12-1
USB Device Controller II:D-8
II:D-8, II:E-3
UDC registers II:12-11
USB On-The-GO
Transceiver Usage II:12-6
USB On-The-Go
Transceivers II:E-4
USB On-The-Go Transceivers II:E-4
USIM
Card Interface Signals II:19-3
Controller Interface II:19-1
V
Variable Latency Input/Output Interface II:6-22
VLIO
Block Diagram II:6-24
Memory Layout Notes II:6-24
Memory Signals II:6-23
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Intel PXA27x Processor Family Design Guide
Index
IX-5