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2
I
S Interface
This chapter describes guidelines to interface the Inter IC Sound (I
PXA27x Processor Family (PXA27x processor) to an external CODEC device.
14.1
Overview
2
I
S is the name of a protocol defined by Philips Semiconductor for transferring two-channel digital
audio signals (digital stereo audio) from one IC device to another. The I
2
I
S link (I
controller consists of buffers, status registers, control registers, serializers, and counters for
transferring digitized audio between the PXA27x processor system memory and an external I
CODEC. The I
2
The I
S controller records digitized audio by storing the samples in system memory. For playback
of digitized audio or production of synthesized audio, the I
samples from PXA27x processor system memory and sends them to a CODEC through the
2
I
SLINK. The external digital-to-analog converter in the CODEC then converts the audio samples
into an analog audio waveform. The I
either by the DMA controller or by programmed I/O.
2
For I
S systems, additional signals controls the external CODEC. Some CODECs use an L3
control bus, which requires three signals for writing bytes into the L3-bus register:
•
L3_CLK
•
L3_DATA
•
L3_MODE
2
The I
S controller supports the L3 bus protocol using software control of the general-purpose I/O
(GPIO) pins. The I
®
Intel
PXA27x Processor Family Design Guide
2
SLINK), which is a low-power four-pin serial interface for stereo audio. The I
2
S controller supports the normal I
2
S controller does not provide hardware control for the L3 bus protocol.
2
S and the MSB-justified I
2
S controller retrieves digitized audio
2
S data are stored to and retrieved from system memory
14
2
S or IIS) controller of Intel
2
S controller controls the
2
S
2
S formats.
II:14-1
®
2
S
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