Layout Notes; Passive Monochrome Dual-Scan Mode; Signals; Passive Monochrome Single-Scan Double-Pixel Data Display Typical Connection - Intel PXA27 Series Design Manual

7.5.2.2 Schematics / Block Diagram
See Figure 7-2
display using double-pixel data mode.
Figure 7-2. Passive Monochrome Single-Scan Double-Pixel Data Display Typical Connection
7.5.2.3

Layout Notes

Refer to Section 7.4, "Layout Notes,"
7.5.3

Passive Monochrome Dual-Scan Mode

Passive monochrome, dual-scan panels drive eight data values per clock cycle. These displays are
connected and programmed as if they are two separate panels, each with half the numbers of lines.
7.5.3.1

Signals

For passive monochrome, dual-scan displays, see
connections between the PXA27x processor and LCD panel.
Table 7-5. Passive Display Pins Required (Sheet 1 of 2)
PXA27x
LCD Panel Pin
processor Pin
DL<3:0>,
LDD<7:0>
DU<3:0>
L_PCLK_WR Pixel_Clock
®
Intel PXA27x Processor Family Design Guide
for illustration of typical connections for a single-scan, monochrome passive
LDD<0>
Top Left
LDD<1>
LDD<2>
LDD<3>
LDD<4>
LDD<5>
LDD<6>
LDD<7>
L_PCLK_WR
L_LCLK_A0
L_FCLK_RD
L_BIAS
for layout notes and considerations.
1
PIn Type Definition
Data lines used to transmit eight data values at a time to the LCD
Output display. Each pin value represents a single pixel. The panel is driven as
if it is two separate panels, each panel with half the number of lines.
Pixel Clock – used by the LCD display to clock the pixel data into the
Output
line shift register.
D0
D1
D2
D3
D4
D5
D6
D7
PIXEL_CLOCK
LINE_CLOCK
FRAME_CLOCK
BIAS
Table 7-5 for description of the pins required for
LCD Interface
II:7-9