Package Introduction - Intel PXA27 Series Design Manual

®
The Intel
0.50 mm (0.0197 inches) VF-BGA molded matrix array package with 32-bit functionality. The
®
Intel PXA271 Processor and Intel
x 0.551 inches), 336-pin 0.65 mm (0.0256 inches) FS-CSP with 32-bit functionality.
Refer to Part I Section 1.3, "Package Introduction,"
1.3

Package Introduction

The PXA27x processor features are:
•
Maximum core frequencies of 624 MHz
•
Variable core voltage from 0.85 V to 1.55 V
•
System memory interface
— Up to 100-MHz SDRAM @ 1.8 V, 2.5 V, 3.0 V or 3.3 V
— Support for 16-, 64-, 128-, 256-, and 512-Mbit SDRAM technologies
— Four Banks of on-chip SRAM, each independently configurable and supporting
64 Kbytes of memory
— Clock enable (provided with 1 CKE pin to put the entire SDRAM interface into self
refresh)
— Supports as many as six static memory devices (SRAM, flash, or VLIO)
•
PCMCIA/Compact Flash card control pins
•
LCD controller pins
•
Full function UART pins
•
Bluetooth* UART pins
•
MMC controller pins
•
SSP pins
•
USB client pins
•
USB host pins
•
AC'97 controller pins
•
Standard UART pins
2
•
I C controller pins
•
PWM pins
•
Memory stick host controller pins
•
Baseband interface pins
•
Keypad interface pins
•
Universal subscriber identity module interface pins
•
Integrated JTAG support
•
General-purpose I/O pins
®
Intel PXA27x Processor Family Design Guide
PXA270 Processor is available in a 13 mm x 13 mm (0.512 x 0.512 inches), 356-pin
®
PXA272 Processor are available in a 14 mm x 14 mm (0.551
for description of the supported features.
Introduction to Part I
I:1-3