Signals; Schematics / Block Diagram - Intel PXA27 Series Design Manual

7.5.9.1

Signals

For active displays, connect the pins as described in
LCD panel.
Table 7-11. Active Display Pins Required
PXA27x
LCD Panel Pin
processor Pin
LDD<7:0> D<7:0>
L_PCLK_WR Write
L_LCLK_A0 Command
L_FCLK_RD Read
L_CS Select
L_VSYNC Sync
2
N/A Vcon
NOTES:
1. In reference to the PXA27x processor. Therefore, outputs are pins that drive a signal from the PXA27x processor to another
device.
2. Vcon is a signal external to the PXA27x processor. Refer to
Note: Names used for "LCD Panel Pin" are representative names and do not match those on all LCD
panels. Similarly, not all signals are required for all modes of operation. Refer to the LCD panel
reference documentation for information on:
•
Specific signals required for correct LCD operation
•
Correct names of the signals used by the LCD panel manufacturer
7.5.9.2

Schematics / Block Diagram

See Figure 7-9
serve as a guide for designing systems that contain LCD displays with embedded frame-buffer
memory.
®
Intel PXA27x Processor Family Design Guide
1
PIn Type
Output Data lines used to transmit the data values to the LCD display.
Output Write signal for embedded frame-buffer LCD panels.
This control signal specifies command or data transactions for
Output
embedded frame-buffer LCD panels.
Output Read signal for smart panels.
Output This pin is used as a chip-select signal.
Input Refresh sync signal from the LCD panel.
Contrast voltage – adjustable voltage input to LCD panel – external
N/A voltage circuitry is required (no pin available on
processor).
for illustration of typical connections for a smart panel. The sample connections
Table 7-11 between the PXA27x processor and
Definition
Section 7.4.1, "Contrast Voltage,"
LCD Interface
the
PXA27x
for detailed information.
II:7-21