Fwh/Lpc Interface; Usb Interface; Hub Interface - Intel 852GME Design Manual

Chipset platforms
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R
14.9.7.

FWH/LPC Interface

Pin Name
LPC_AD[3:0]
14.9.8.

USB Interface

Pin Name
USB_OC[5:0]#
USBRBIAS,
USBRBIAS#
14.9.9.

Hub Interface

Pin Name
HUB_RCOMP
HUB_VREF,
HUB_VSWING
HUB_PD11
®
®
Intel
852GME, Intel
852GMV and Intel
System
Pull-up/Pull-down
No extra pull-ups required. Connect straight to FWH/LPC.
System
Pull-up/Pull-down
10 k pull-up to V3ALWAYS
if not driven
22.6
± 1% pull-down to gnd
System
Pull-up/Pull-down
48.7
1% pull-up to to Vcc1_5
Please refer to Figure 118 and
Figure 119 and Figure 120
56
pull-down to gnd
®
852PM Chipset Platforms Design Guide
Platform Design Checklist
Notes
Notes
No pull-up is required if signalsl are driven.. Signals
must NOT float if they are not being used.
Connect signals together and pull down through a
common resistor, placed within 500 mils of the ICH4-
M. Avoid routing next to clock pin.
Notes
Place resistor within 0.5" of ICH4-M pad using a
thick trace.
HUB_VREF signal voltage level = 0.35 V ± 8%.
HUB_VSWING signal voltage level = 0.80 V ±
8%. Three options are available for generating
these references.
265

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