Figure 16. Mtrrphysbasen Register Format - AMD Athlon Processor x86 Optimization Manual

22007E/0—November 1999
Variable-Range
MTRRs
Variable-Range MTRR
Register Format
63
Reserved
Symbol Description
Physical Base Base address in Register Pair
Type See MTRR Types and Properties

Figure 16. MTRRphysBasen Register Format

Page Attribute Table (PAT)
A variable MTRR can be programmed to start at address
0000_0000h because the fixed MTRRs always override the
variable ones. However, it is recommended not to create an
overlap.
The upper two variable MTRRs should not be used by the BIOS
and are reserved for operating system use.
The variable address range is power of 2 sized and aligned. The
range of supported sizes is from 2
AMD Athlon processor does not implement A[35:32].
36
Bits
35–12
7–0
Note: A software attempt to write to reserved bits will generate a
general protection exception.
Physical Specifies a 24-bit value which is extended by 12
Base bits to form the base address of the region defined
in the register pair.
Type See "Standard MTRR Types and Properties" on
page 176.
AMD Athlon™ Processor x86 Code Optimization
12
to 2
35
Physical Base
36
in powers of 2. The
12 11 8 7 0
Type
183