AMD Athlon Processor x86 Optimization Manual page 220

AMD Athlon™ Processor x86 Code Optimization
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
SETS mreg8
SETS mem8
SETNS mreg8
SETNS mem8
SETP/SETPE mreg8
SETP/SETPE mem8
SETNP/SETPO mreg8
SETNP/SETPO mem8
SETL/SETNGE mreg8
SETL/SETNGE mem8
SETGE/SETNL mreg8
SETGE/SETNL mem8
SETLE/SETNG mreg8
SETLE/SETNG mem8
SETG/SETNLE mreg8
SETG/SETNLE mem8
SGDT mem48
SIDT mem48
SHL/SAL mreg8, imm8
SHL/SAL mem8, imm8
SHL/SAL mreg16/32, imm8
SHL/SAL mem16/32, imm8
SHL/SAL mreg8, 1
SHL/SAL mem8, 1
SHL/SAL mreg16/32, 1
SHL/SAL mem16/32, 1
SHL/SAL mreg8, CL
SHL/SAL mem8, CL
SHL/SAL mreg16/32, CL
SHL/SAL mem16/32, CL
SHR mreg8, imm8
SHR mem8, imm8
SHR mreg16/32, imm8
204
First Second ModR/M
Byte Byte Byte
0Fh 98h 11-xxx-xxx
0Fh 98h mm-xxx-xxx DirectPath
0Fh 99h 11-xxx-xxx
0Fh 99h mm-xxx-xxx DirectPath
0Fh 9Ah 11-xxx-xxx
0Fh 9Ah mm-xxx-xxx DirectPath
0Fh 9Bh 11-xxx-xxx
0Fh 9Bh mm-xxx-xxx DirectPath
0Fh 9Ch 11-xxx-xxx
0Fh 9Ch mm-xxx-xxx DirectPath
0Fh 9Dh 11-xxx-xxx
0Fh 9Dh mm-xxx-xxx DirectPath
0Fh 9Eh 11-xxx-xxx
0Fh 9Eh mm-xxx-xxx DirectPath
0Fh 9Fh 11-xxx-xxx
0Fh 9Fh mm-xxx-xxx DirectPath
0Fh 01h mm-000-xxx VectorPath
0Fh 01h mm-001-xxx VectorPath
C0h 11-100-xxx
C0h mm-100-xxx DirectPath
C1h 11-100-xxx
C1h mm-100-xxx DirectPath
D0h 11-100-xxx
D0h mm-100-xxx DirectPath
D1h 11-100-xxx
D1h mm-100-xxx DirectPath
D2h 11-100-xxx
D2h mm-100-xxx DirectPath
D3h 11-100-xxx
D3h mm-100-xxx DirectPath
C0h 11-101-xxx
C0h mm-101-xxx DirectPath
C1h 11-101-xxx
Instruction Dispatch and Execution Resources
22007E/0—November 1999
Decode
Type
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath