Vectorpath Instructions; Table 29. Vectorpath Integer Instructions; Table 30. Vectorpath Mmx Instructions; Table 32. Vectorpath Floating-Point Instructions - AMD Athlon Processor x86 Optimization Manual

22007E/0—November 1999

VectorPath Instructions

Table 29. VectorPath Integer Instructions

Instruction Mnemonic
AAA
AAD
AAM
AAS
ARPL mreg16, reg16
ARPL mem16, reg16
BOUND
BSF reg16/32, mreg16/32
BSF reg16/32, mem16/32
BSR reg16/32, mreg16/32
BSR reg16/32, mem16/32
BT mem16/32, reg16/32
BTC mreg16/32, reg16/32
BTC mem16/32, reg16/32
BTC mreg16/32, imm8
BTC mem16/32, imm8
BTR mreg16/32, reg16/32
BTR mem16/32, reg16/32
BTR mreg16/32, imm8
BTR mem16/32, imm8
BTS mreg16/32, reg16/32
BTS mem16/32, reg16/32
BTS mreg16/32, imm8
VectorPath Instructions
The following tables contain VectorPath instructions, which
should be avoided in the AMD Athlon processor:
Table 29, "VectorPath Integer Instructions," on page 231
Table 30, "VectorPath MMX™ Instructions," on page 234
and Table 31, "VectorPath MMX™ Extensions," on
page 234
Table 32, "VectorPath Floating-Point Instructions," on
page 235
AMD Athlon™ Processor x86 Code Optimization
Table 29. VectorPath Integer Instructions (Continued)
Instruction Mnemonic
BTS mem16/32, imm8
CALL full pointer
CALL near imm16/32
CALL mem16:16/32
CALL near mreg32 (indirect)
CALL near mem32 (indirect)
CLD
CLI
CLTS
CMPSB mem8,mem8
CMPSW mem16, mem32
CMPSD mem32, mem32
CMPXCHG mreg8, reg8
CMPXCHG mem8, reg8
CMPXCHG mreg16/32, reg16/32
CMPXCHG mem16/32, reg16/32
CMPXCHG8B mem64
CPUID
DAA
DAS
DIV AL, mreg8
DIV AL, mem8
DIV EAX, mreg16/32
231