Floating-Point Optimizations; Ensure All Fpu Data Is Aligned; Use Multiplies Rather Than Divides - AMD Athlon Processor x86 Optimization Manual

X86 code optimization
Table of Contents

Advertisement

22007E/0—November 1999

Ensure All FPU Data is Aligned

Use Multiplies Rather than Divides

Ensure All FPU Data is Aligned

Floating-Point Optimizations

T h i s ch a p t e r d e t a i l s t h e m e t h o d s u s e d t o o p t i m i z e
floating-point code to the pipelined floating-point unit (FPU).
Guidelines are listed in order of importance.
As discussed in "Memory Size and Alignment Issues" on page
45, floating-point data should be naturally aligned. That is,
words should be aligned on word boundaries, doublewords on
doubleword boundaries, and quadwords on quadword
boundaries. Misaligned memory accesses reduce the available
memory bandwidth.
If accuracy requirements allow, floating-point division by a
constant should be converted to a multiply by the reciprocal.
Divisors that are powers of two and their reciprocal are exactly
representable, except in the rare case that the reciprocal
overflows or underflows, and therefore does not cause an
accuracy issue. Unless such an overflow or underflow occurs, a
division by a power of two should always be converted to a
mu l t i p ly. A l t h o u g h t h e A M D A t h l o n ™ p ro c e s s o r h a s
high-performance division, multiplies are significantly faster
than divides.
AMD Athlon™ Processor x86 Code Optimization
9
97

Advertisement

Table of Contents
loading

Table of Contents