Table 23. 3Dnow!™ Instructions - AMD Athlon Processor x86 Optimization Manual

22007E/0—November 1999
Table 23. 3DNow!™ Instructions
Instruction Mnemonic
FEMMS
PAVGUSB mmreg1, mmreg2
PAVGUSB mmreg, mem64
PF2ID mmreg1, mmreg2
PF2ID mmreg, mem64
PFACC mmreg1, mmreg2
PFACC mmreg, mem64
PFADD mmreg1, mmreg2
PFADD mmreg, mem64
PFCMPEQ mmreg1, mmreg2
PFCMPEQ mmreg, mem64
PFCMPGE mmreg1, mmreg2
PFCMPGE mmreg, mem64
PFCMPGT mmreg1, mmreg2
PFCMPGT mmreg, mem64
PFMAX mmreg1, mmreg2
PFMAX mmreg, mem64
PFMIN mmreg1, mmreg2
PFMIN mmreg, mem64
PFMUL mmreg1, mmreg2
PFMUL mmreg, mem64
PFRCP mmreg1, mmreg2
PFRCP mmreg, mem64
PFRCPIT1 mmreg1, mmreg2
PFRCPIT1 mmreg, mem64
PFRCPIT2 mmreg1, mmreg2
PFRCPIT2 mmreg, mem64
PFRSQIT1 mmreg1, mmreg2
PFRSQIT1 mmreg, mem64
PFRSQRT mmreg1, mmreg2
Notes:
1. For the PREFETCH and PREFETCHW instructions, the mem8 value refers to an address in the 64-byte line that will be
prefetched.
2. The byte listed in the column titled 'imm8' is actually the opcode byte.
Instruction Dispatch and Execution Resources
Prefix ModR/M
imm8
Byte(s) Byte
0Fh 0Eh
0Fh, 0Fh BFh 11-xxx-xxx
0Fh, 0Fh BFh mm-xxx-xxx DirectPath
0Fh, 0Fh 1Dh 11-xxx-xxx
0Fh, 0Fh 1Dh mm-xxx-xxx DirectPath
0Fh, 0Fh AEh 11-xxx-xxx
0Fh, 0Fh AEh mm-xxx-xxx DirectPath
0Fh, 0Fh 9Eh 11-xxx-xxx
0Fh, 0Fh 9Eh mm-xxx-xxx DirectPath
0Fh, 0Fh B0h 11-xxx-xxx
0Fh, 0Fh B0h mm-xxx-xxx DirectPath
0Fh, 0Fh 90h 11-xxx-xxx
0Fh, 0Fh 90h mm-xxx-xxx DirectPath
0Fh, 0Fh A0h 11-xxx-xxx
0Fh, 0Fh A0h mm-xxx-xxx DirectPath
0Fh, 0Fh A4h 11-xxx-xxx
0Fh, 0Fh A4h mm-xxx-xxx DirectPath
0Fh, 0Fh 94h 11-xxx-xxx
0Fh, 0Fh 94h mm-xxx-xxx DirectPath
0Fh, 0Fh B4h 11-xxx-xxx
0Fh, 0Fh B4h mm-xxx-xxx DirectPath
0Fh, 0Fh 96h 11-xxx-xxx
0Fh, 0Fh 96h mm-xxx-xxx DirectPath
0Fh, 0Fh A6h 11-xxx-xxx
0Fh, 0Fh A6h mm-xxx-xxx DirectPath
0Fh, 0Fh B6h 11-xxx-xxx
0Fh, 0Fh B6h mm-xxx-xxx DirectPath
0Fh, 0Fh A7h 11-xxx-xxx
0Fh, 0Fh A7h mm-xxx-xxx DirectPath
0Fh, 0Fh 97h 11-xxx-xxx
AMD Athlon™ Processor x86 Code Optimization
Decode FPU
Type Pipe(s)
DirectPath FADD/FMUL/FSTORE
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FADD
FADD
DirectPath FMUL
FMUL
DirectPath FMUL
FMUL
DirectPath FMUL
FMUL
DirectPath FMUL
FMUL
DirectPath FMUL
FMUL
DirectPath FMUL
Note
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