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AMD Athlon™ Processor x86 Code Optimization
Optimization Star
TOP
Group I Optimizations — Essential Optimizations
Memory Size and Alignment Issues
Avoid Memory Size Mismatches
TOP
Align Data Where Possible
TOP
Use the 3DNow!™ PREFETCH and PREFETCHW Instructions
TOP
8
Avoid Placing Code and Data in the Same 64-Byte Cache
Line
The top optimizations described in this chapter are flagged
with a star. In addition, the star appears beside the more
detailed descriptions found in subsequent chapters.
See "Memory Size and Alignment Issues" on page 45 for more
details.
Avoid memory size mismatches when instructions operate on
the same data. For instructions that store and reload the same
data, keep operands aligned and keep the loads/stores of each
operand the same size.
Avoid misaligned data references. A misaligned store or load
operation suffers a minimum one-cycle penalty in the
AMD Athlon processor load/store pipeline.
For code that can take advantage of prefetching, use the
3DNow! PREFETCH and PREFETCHW instructions to increase
the effective bandwidth to the AMD Athlon processor, which
sig n ific a n tly im p roves p er fo rma n c e. A ll t h e p ref e tch
instructions are essentially integer instructions and can be used
22007E/0—November 1999
Optimization Star
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