AMD Athlon Processor x86 Optimization Manual page 215

22007E/0—November 1999
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
NOT mem8
NOT mreg16/32
NOT mem16/32
OR mreg8, reg8
OR mem8, reg8
OR mreg16/32, reg16/32
OR mem16/32, reg16/32
OR reg8, mreg8
OR reg8, mem8
OR reg16/32, mreg16/32
OR reg16/32, mem16/32
OR AL, imm8
OR EAX, imm16/32
OR mreg8, imm8
OR mem8, imm8
OR mreg16/32, imm16/32
OR mem16/32, imm16/32
OR mreg16/32, imm8 (sign extended)
OR mem16/32, imm8 (sign extended)
OUT imm8, AL
OUT imm8, AX
OUT imm8, EAX
OUT DX, AL
OUT DX, AX
OUT DX, EAX
POP ES
POP SS
POP DS
POP FS
POP GS
POP EAX
POP ECX
POP EDX
Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
First Second ModR/M
Byte Byte Byte
F6h mm-010-xx
F7h 11-010-xxx
F7h mm-010-xx
08h 11-xxx-xxx
08h mm-xxx-xxx DirectPath
09h 11-xxx-xxx
09h mm-xxx-xxx DirectPath
0Ah 11-xxx-xxx
0Ah mm-xxx-xxx DirectPath
0Bh 11-xxx-xxx
0Bh mm-xxx-xxx DirectPath
0Ch
0Dh
80h 11-001-xxx
80h mm-001-xxx DirectPath
81h 11-001-xxx
81h mm-001-xxx DirectPath
83h 11-001-xxx
83h mm-001-xxx DirectPath
E6h
E7h
E7h
EEh
EFh
EFh
07h
17h
1Fh
0Fh A1h
0Fh A9h
58h
59h
5Ah
Decode
Type
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
VectorPath
199