Table 21. Mmx Extensions - AMD Athlon Processor x86 Optimization Manual

22007E/0—November 1999
Table 20. MMX™ Instructions (Continued)
Instruction Mnemonic
PUNPCKHDQ mmreg1, mmreg2
PUNPCKHDQ mmreg, mem64
PUNPCKHWD mmreg1, mmreg2
PUNPCKHWD mmreg, mem64
PUNPCKLBW mmreg1, mmreg2
PUNPCKLBW mmreg, mem64
PUNPCKLDQ mmreg1, mmreg2
PUNPCKLDQ mmreg, mem64
PUNPCKLWD mmreg1, mmreg2
PUNPCKLWD mmreg, mem64
PXOR mmreg1, mmreg2
PXOR mmreg, mem64
Notes:
1. Bits 2, 1, and 0 of the modR/M byte select the integer register.
Table 21. MMX™ Extensions
Instruction Mnemonic
MASKMOVQ mmreg1, mmreg2
MOVNTQ mem64, mmreg
PAVGB mmreg1, mmreg2
PAVGB mmreg, mem64
PAVGW mmreg1, mmreg2
PAVGW mmreg, mem64
PEXTRW reg32, mmreg, imm8
PINSRW mmreg, reg32, imm8
PINSRW mmreg, mem16, imm8
PMAXSW mmreg1, mmreg2
PMAXSW mmreg, mem64
PMAXUB mmreg1, mmreg2
PMAXUB mmreg, mem64
PMINSW mmreg1, mmreg2
Notes:
1. For the PREFETCHNTA/T0/T1/T2 instructions, the mem8 value refers to an address in the 64-byte line that will be prefetched.
Instruction Dispatch and Execution Resources
Prefix First ModR/M
Byte(s) Byte Byte
0Fh 6Ah 11-xxx-xxx
0Fh 6Ah mm-xxx-xxx DirectPath
0Fh 69h 11-xxx-xxx
0Fh 69h mm-xxx-xxx DirectPath
0Fh 60h 11-xxx-xxx
0Fh 60h mm-xxx-xxx DirectPath
0Fh 62h 11-xxx-xxx
0Fh 62h mm-xxx-xxx DirectPath
0Fh 61h 11-xxx-xxx
0Fh 61h mm-xxx-xxx DirectPath
0Fh EFh 11-xxx-xxx
0Fh EFh mm-xxx-xxx DirectPath
Prefix First ModR/M
Byte(s) Byte Byte
0Fh F7h
0Fh E7h
0Fh E0h 11-xxx-xxx
0Fh E0h mm-xxx-xxx DirectPath
0Fh E3h 11-xxx-xxx
0Fh E3h mm-xxx-xxx DirectPath
0Fh C5h
0Fh C4h
0Fh C4h
0Fh EEh 11-xxx-xxx
0Fh EEh mm-xxx-xxx DirectPath
0Fh DEh 11-xxx-xxx
0Fh DEh mm-xxx-xxx DirectPath
0Fh EAh 11-xxx-xxx
AMD Athlon™ Processor x86 Code Optimization
Decode
FPU Pipe(s)
Type
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
Decode FPU
Type Pipe(s)
VectorPath FADD/FMUL/FSTORE
DirectPath FSTORE
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
VectorPath
VectorPath
VectorPath
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
FADD/FMUL
DirectPath FADD/FMUL
Notes
Notes
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